US特許

No. 公報番号 出願日 出願人 発明の名称 A分類 分類 発明相応図 和文コメント Abstract
1 US6705152 2004/03/16 NanoProducts Corporation Longmont CO [US] Nanostructured ceramic platform for micromachined devices and device arrays A1 DEX DF02 FP ナノ構造を有するセラミックのガスセンサーまたはガスセンサーアレイに関するものであって、内部に高密度のナノスケールの空孔を有する陽極酸化アルミナ膜からなり、センシング材料がその内部に成膜されていることを特徴とする。 The present invention discloses a type of nanostructured ceramic platform for gas sensors and sensor arrays. These sensors comprise micromachined anodic aluminum oxide films which contains extremely high density (e.g. 1011 cm-2) nanoscale pores. Sensing materials deposited inside this self-organized network of nanopores have ultra-high surface area and nanometer grain structure therefore enabling high sensitivity. Refractory nature of alumina ceramic enables the desired robustness long lifetime and stability in harsh environment. This sensor platform can been used for both chemical gas and physical (humidity temperature) sensors and sensor arrays.
2 US6783643 2004/08/31 President and Fellows of Harvard College Cambridge MA [US] Control of solid state dimensional features A1 DFX PBX 6c イオンの入射流束にさらされる表面を有する固体構造に関するもので、入射イオンによる表面のスパッタリングがコントロールされ、前記構造は表面構造、その形状に対応した表面材料を含むことを特徴とする。 A solid state structure having a surface is provided and exposed to a flux F of incident ions under conditions that are selected based on:(Equation image 1 not included in text) where C is concentration of mobile adatoms at structure surface r is vector surface position t is time T1 is number of adatoms created per incident ion D is adatom diffusivity tau trap is average lifetime of an adatom before adatom annihilation occurs at a structure surface defect characteristic of structure material and sigma C is cross-section for adatom annihilation by incident ions characteristic of selected ion exposure conditions. Ion exposure condition selection controls sputtering of the structure surface by incident ions to transport within the structure including the structure surface structure material to a feature location in response to the ion flux exposure to produce a feature substantially by locally adding structure material to the feature location.
3 US6924538 2005/08/02 Nantero Inc. Woburn MA [US] Devices having vertically-disposed nanofabric articles and methods of making the same A1 DFX FP MEMSスイッチと鉛直方向にナノスケールで形成されてなるメモリセル、及びその製法に関するもので、MEMSスイッチは主たる水平方向空間を有し、その中にチャンネル部が形成されている。 Electro-mechanical switches and memory cells using vertically-disposed nanofabric articles and methods of making the same are described. An electro-mechanical device includes a structure having a major horizontal surface and a channel formed therein. A conductive trace is in the channel; and a nanotube article vertically suspended in the channel in spaced relation to a vertical wall of the channel. The article is electro-mechanically deflectable in a horizontal direction toward the conductive trace. Under certain embodiments the vertically suspended extent of the nanotube article is defined by a thin film process. Under certain embodiments the vertically suspended extent of the nanotube article is about 50 nanometers or less. Under certain embodiments the nanotube article is clamped with a conducting material disposed in porous spaces between some nanotubes of the nanotube article. Under certain embodiments the nanotube article is formed from a porous nanofabric. Under certain embodiments the nanotube article is electromechanically deflectable into contact with the conductive trace and the contact is either a volatile state or non-volatile state depending on the device construction. Under certain embodiments the vertically oriented device is arranged into various forms of three-trace devices. Under certain embodiments the channel may be used for multiple independent devices or for devices that share a common electrode.
4 US6436794 2002/08/20 Hewlett-Packard Company Palo Alto CA [US] Process flow for ARS mover using selenidation wafer bonding before processing a media side of a rotor wafer A1 A2 DEX PGX MB01 MD09 2a 原子レベル解像度のストレージ(ARS)システムの改良プロセスに関するものであり、グラインディングやCMPなどのウエハ薄片化の前にローターウエハの記録媒体側に導電層を形成することなどを特徴とする。CMOS回路はステーターウエハに後で形成する。 An improved process flow for an atomic resolution storage (ARS) system deposits conductive electrodes on a media side of a rotor wafer before wafer thinning process i.e. grinding and CMP thus protecting the conductive electrodes on a media surface from the grinding process. In addition the CMOS circuitry is formed in a stator wafer at a relatively later stage. Therefore the CMOS circuitry is less likely to be damaged by heat processing. In addition some of the necessary processing may be performed with loosened thermal budget. Finally because wafer bonding of the rotor wafer and the stator wafer is performed at a later stage there is less probability of degradation of the wafer bonding. Accordingly device yield may be enhanced leading to lower manufacturing cost.
5 US6440820 2002/08/27 Hewlett Packard Company Palo Alto CA [US] Process flow for ARS mover using selenidation wafer bonding after processing a media side of a rotor wafer A1 A2 DEX PGX 2a 原子レベル解像度のストレージ(ARS)システムの改良プロセスに関するものであり、他のプロセスに先立って、ローターウエハの記録媒体側に導電層や他の保護膜を形成する。CMOS回路はステーターウエハに後で形成する。 An improved process flow for an atomic resolution storage (ARS) system deposits conductive electrodes together with a protective layer on a media side of a rotor wafer before most of other device processing thus preserving a surface for ARS storage media from subsequent wafer thinning process. CMOS circuitry is also formed in a stator wafer at a later stage. Therefore the CMOS circuitry is less likely to be damaged by heat processing. In addition processing of the media side of the rotor wafer may be performed with loosened thermal budget. Finally because the media side of the rotor wafer is processed before wafer bonding of the rotor wafer and the stator wafer there is less probability of degradation of the wafer bonding. Therefore device yield may be enhanced leading to lower manufacturing cost.
6 US6784028 2004/08/31 Nantero Inc. Woburn MA [US] Methods of making electromechanical three-trace junction devices A1 A2 DFX PI02 MD04 MD06 1 電子機械回路の製法に関するものであり、下部の部位には下部を支持する構造と導電層を有し、ナノチューブリボンは下部部位の上面に形成されており、下部の支持構造とコンタクトする構造になっている。前記ナノチューブリボンの上に上部構造がある。 Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an upper surface of the lower structure so as to contact the lower support structures. An upper structure is provided over the nanotube ribbon. The upper structure includes upper support structures and an upper electrically conductive element. In some arrangements the upper and lower electrically conductive elements are in vertical alignment but in some arrangements they are not.
7 US6082208 2000/07/04 Sandia Corporation Albuquerque NM [US] Method for fabricating five-level microelectromechanical structures and microelectromechanical transmission formed A2 DFX PA01 PB01 MA02 MB03 8 4層の機械的構造のポリシリコンと1層の電気的な参照電位面となる下層のポリシリコンからなる少なくとも5層のポリシリコンからなる複合MEMSの製法に関するものである。 A process for forming complex microelectromechanical (MEM) devices having five layers or levels of polysilicon including four structural polysilicon layers wherein mechanical elements can be formed and an underlying polysilicon layer forming a voltage reference plane. A particular type of MEM device that can be formed with the five-level polysilicon process is a MEM transmission for controlling or interlocking mechanical power transfer between an electrostatic motor and a self-assembling structure (e.g. a hinged pop-up mirror for use with an incident laser beam). The MEM transmission is based on an incomplete gear train and a bridging set of gears that can be moved into place to complete the gear train to enable power transfer. The MEM transmission has particular applications as a safety component for surety and for this purpose can incorporate a pin-in-maze discriminator responsive to a coded input signal.
8 US6136630 2000/10/24 The Regents of the University of Michigan Ann Arbor MI [US] Method of making a micromechanical device from a single crystal semiconductor substrate and monolithic sensor formed thereby A2 DB02 PB03 MA01 1g モノリシックに形成されたセンサーに関するもので、機械部は、シリコン単結晶基板とは電気的には絶縁されてながらも、稼動するように支持されている構造を有し、BiCMOSと集積されていることを特徴とする。 A monolithic sensor including a doped mechanical structure is movably supported by but electrically isolated from a single crystal semiconductor substrate of the sensor through a relatively simple process. The sensor is preferably made from a single crystal silicon substrate using front-side release etch-diffusion. Thick single crystal Si micromechanical devices are combined with a conventional bipolar complimentary metal oxide semiconductor (BiCMOS) integrated circuit process. This merged process allows the integration of Si mechanical resonators as thick as 15 MU m thick or more with any conventional integrated circuit process with the addition of only a single masking step. The process does not require the use of Si on insulator wafers or any type of wafer bonding. The Si resonators are etched in an inductively coupled plasma source which allows deep trenches to be fabricated with high aspect ratios and smooth sidewall surfaces. Clamped-clamped beam Si resonators 500 MU m long 5 MU m wide and 11 MU m thick are disclosed. A typical resonator had a resonance frequency of 28.9 kHz and an amplitude of vibration at resonance of 4.6 MU m in air. Working NMOS transistors are fabricated on the same chip as the resonator with measured threshold voltages of 0.6 V and an output conductance of 2.0 * 10-5 OMEGA -1 for a gage voltage of 4 V.
9 US6362512 2002/03/26 Xerox Corporation Stamford CT [US] Microelectromechanical structures defined from silicon on insulator wafers A2 DA01 DA06 DB01 DD01 DD02 PA01 PB02 MA01 MA02 3 単結晶シリコン中に、厚い酸化膜などでハンドルウエハと分離されてデバイスが形成されており、このデバイスはセンサーやCMOS回路が集積されたものであり、ハンドルウエハから剥離することができる。 A device structure is defined in a single-crystal silicon (SCS) layer separated by an insulator layer such as an oxide layer from a handle wafer. The SCS can be attached to the insulator by wafer bonding and is selectively etched as by photolithographic patterning and dry etching. A sacrificial oxide layer can be deposited on the etched SCS on which polysilicon can be deposited. A protective oxide layer is deposited and CMOS circuitry and sensors are integrated. Silicon microstructures with sensors connected to CMOS circuitry are released. In addition holes can be etched through the sacrificial oxide layer sacrificial oxide can be deposited on the etched SCS polysilicon can be deposited on the sacrificial oxide PSG can be deposited on the polysilicon layer which both can then be patterned.
10 US6479320 2002/11/12 Raytheon Company Lexington MA [US] Vacuum package fabrication of microelectromechanical system devices with integrated circuit components A2 DDX DFX PG04 MD04 MD09 7 真空でパッケージするMEMSデバイスの製法に関するもので、一枚のウエハに複数のMEMSデバイスを形成し、各MEMSやパッドのの周辺に第一のシーリング用リングが形成されてなり、一方、集積回路が形成された蓋ウエハには第二のシーリング・リングが形成されている。 A method for vacuum packaging MEMS devices is provided that comprises forming a plurality of MEMS devices (12) on a device wafer (10). A first sealing ring (16) is formed surrounding one of the MEMS devices (12) and any associated mating pads (70). A plurality of integrated circuit devices (80) is formed on a lid wafer (30) where each integrated circuit device (80) has one or more associated mating pads (82) and one or more associated bonding pads (86). A plurality of second sealing rings (32) is formed on the lid wafer (30) where each of the second sealing rings (32) surrounds one of the integrated circuit devices (80) and any associated bonding pads (82). The second sealing ring (32) is positioned between the perimeter of the integrated circuit device (80) and the associated bonding pads (86). A sealing layer is formed on either each first sealing ring (16) or each second sealing ring (32). The device wafer (10) is mated with the lid wafer (30) in a vacuum environment to form a plurality of vacuum packages where each vacuum package encloses one or more of the MEMS devices (12) and one or more of the integrated circuit devices (80).
11 US6512300 2003/01/28 Raytheon Company Lexington MA [US] Water level interconnection A2 DB01 PGX MAX 1 第一の高抵抗基板に形成されたRF-MEMSシステムが、第二の低抵抗基板に形成された回路と第一の基板が重畳するように結合され、第一の基板の回路と第二の基板の回路が相対するように配置されており、、その間は不活性ガスで満たされている。厚い絶縁膜リッドがMEMSデバイスの周辺に形成されている。 RF MicroElectroMechanical Systems (MEMs) circuitry(15) on a first high resistivity substrate (17)is combined with circuitry (11) onsecond low-resisitivity substrate (13) by overlapping the first high resisitivity substrate (17)and MEMs circuitry (15) with the low resisitivity substrate(13) and circuitry (11) with the MEMs circuitry (15)facing the second circuitry (11). A dielectric lid (19) is placed over the MEMs circuitry (15)and between the first substrate (17)and second substrate (13)with an inert gas in a gap (21)over the MEMs circuitry (15). Interconnecting conductors (25 31 35 37 39 41) extend perpendicular and through the high resistivity substrate (17)and through the dielectric lid (19) to make electrical connection with the low resisitivity substrate (13).
12 US6531331 2003/03/11 Sandia Corporation Albuquerque NM [US] Monolithic integration of a MOSFET with a MEMS device A2 DD03 PA01 MA01 MA02 MB01MD01 1I 共通の基板に少なくともひとつのMOSFETと少なくともひとつのMEMSが形成された集積化MEMSであって、その集積化の方法は共通の基板にモノリシックにMOSFETとMEMSを形成するものである。 An integrated microelectromechanical system comprises at least one MOSFET interconnected to at least one MEMS device on a common substrate. A method for integrating the MOSFET with the MEMS device comprises fabricating the MOSFET and MEMS device monolithically on the common substrate. Conveniently the gate insulator gate electrode and electrical contacts for the gate source and drain can be formed simultaneously with the MEMS device structure thereby eliminating many process steps and materials. In particular the gate electrode and electrical contacts of the MOSFET and the structural layers of the MEMS device can be doped polysilicon. Dopant diffusion from the electrical contacts is used to form the source and drain regions of the MOSFET. The thermal diffusion step for forming the source and drain of the MOSFET can comprise one or more of the thermal anneal steps to relieve stress in the structural layers of the MEMS device.
13 US6559530 2003/05/06 Raytheon Company Lexington MA [US] Method of integrating MEMS device with low-resistivity silicon substrates A2 DB01 DB04 DB05 PG01 MA01 MAX ME01 3b MEMSデバイスと非MEMSデバイスを集積する製法において、非MEMSデバイスを通常の方法で形成する。そのために非MEMSデバイスが形成された基板上に厚い絶縁膜を形成し、MEMSデバイスはその上に形成し、厚い絶縁膜を通して導通を得る。 A method of integrating MEMS devices with non-MEMS circuitry requires fabricating non-MEMS devices on a substrate in a conventional fashion. A thick dielectric layer is deposited on the completed devices and the MEMS devices fabricated on the dielectric layer. Vias through the dielectric layer interconnect the MEMS devices to the non-MEMS electronics. The interposed dielectric layer allows the common substrate to have characteristics that best suit the non-MEMS components without degrading the MEMS performance. Another approach involves bonding together two separate wafers--one for the MEMS devices and one for non-MEMS electronics. A package lid having filled vias formed therethrough is bonded to the MEMS wafer sealing the MEMS devices within. The non-MEMS wafer is mounted to the lid with the vias effecting the necessary interconnections between the two wafers. This enables the MEMS devices and the non-MEMS electronics to function as a single IC while retaining the established processes associated with each component type.
14 US6624003 2003/09/23 Teravicta Technologies Inc. Austin TX [US] Integrated MEMS device and package A2 DB01 PH01 PH04 8B 下方の面に導電層を有するパッケージ基板を含む電子機械回路であって、前記回路は前記基板の上方の面にMEMSデバイスを有し、前記デバイスの少なくともひとつの素子の上面は基板の上方の面と接続されている。 A microelectromechanical circuit includes a packaging substrate having conductive features on its lower surface. The circuit may further include a microelectromechanical device formed upon the upper surface of the substrate wherein an underside of at least one element of the device is in contact with the upper surface of the substrate. In some embodiments the circuit may include one or more covers spaced above the substrate and the device. The circuit may further include a sealing structure laterally surrounding the device and interposed between the substrate and the covers. An array of microelectromechanical circuits may include a packaging substrate with first and second microelectromechanical devices laterally spaced upon its upper surface first and second covers above the substrate and the first and second devices and a sealing structure between the substrate and the first and second covers. A method for forming a microelectromechanical device may include forming the device upon a packaging substrate having one or more conductive features upon its lower surface.
15 US6633079 2003/10/14 Raytheon Company Lexington MA [US] Wafer level interconnection A2 DB01 DB04 DB05 MA01 MAX 1 第一の高抵抗基板に形成されたRF-MEMSシステムが、第二の低抵抗基板に形成された回路と第一の基板が重畳するように結合され、厚い絶縁膜リッドがMEMSデバイスの周辺に形成されている。ふたつの基板の間は不活性ガスで満たされている。 RF MicroElectroMechanical Systems (MEMS) circuitry (15) on a first high resistivity substrate (17) is combined with circuitry (11) on a second low resistivity substrate (13) by overlapping the first high resistivity substrate (17) and MEMS circuitry (15) with the low resistivity substrate (13) and circuitry (11) with the MEMS circuitry (15) facing the second circuitry (11). A dielectric lid (19) is placed over the MEMS circuitry (15) and between the first substrate (17) and second substrate (13) with an inert gas in a gap (21) over the MEMS circuitry (15). Interconnecting conductors (25 31 35 37 39 41) extend perpendicular and through the high resistivity substrate (17) and through the dielectric lid (19) to make electrical connection with the low resistivity substrate (13).
16 US6648453 2003/11/18 Silverbrook Research Pty Ltd Balmain [AU] Ink jet printhead chip with predetermined micro-electromechanical systems height A2 DC03 PA02 PHX MD04 ME01 ME10 4 インクジェットプリンターヘッドのチップがウエハに形成されているものであって、CMOSドライブ回路が前記上はウエハ上にも形成されており、ノズルアレイも前記ウエハに同時に形成されている。MEMSアクチュエーターはCMOSドライブ回路と結合している。 An ink jet printhead chip includes a wafer substrate. A CMOS drive circuitry layer is positioned on the wafer substrate. A plurality of nozzle arrangements is positioned on the wafer substrate and the CMOS drive circuitry layer. Each nozzle arrangement includes nozzle chamber walls and a roof wall that define a nozzle chamber and an ink ejection port defined in the roof wall. A micro-electromechanical actuator is connected to the CMOS drive circuitry layer. The actuator has at least one movable member that is positioned to act on ink in the nozzle chamber to eject the ink from the ink ejection port on receipt of a signal from the drive circuitry layer. The movable member is spaced between 2 microns and 15 microns from the CMOS drive circuitry layer.
17 US6667558 2003/12/23 The Regents of the University of Michigan Ann Arbor MI [US] Module and method of making same A2 DB01 DB02 DB04 PA01 PB02 MAX 1J マイクロプラットフォームに形成されたモジュール及びその改良された形成法に関するもので、前記マイクロプラットフォーム上に形成されたMEMS部の基板に複数のボンディング部を設け、BiCMOS部にも複数のボンディング部を設け、それを機械的、電気的に結合させ集積させるものである。 A module bonded together at a microplatform and an improved method for making the module are provided. The method includes providing a micromechanical device including a first substrate the microplatform a first plurality of bonding sites on the microplatform a micromechanical structure fabricated and supported on the microplatform and a support structure to suspend the microplatform above the first substrate. The method further includes providing a transistor circuit wafer including a second plurality of bonding sites thereon and integrated BiCMOS transistor circuits. The first and second plurality of bonding sites are aligned and compression bonded so that the microplatform is both electrically and mechanically coupled to the second substrate to form the module. The platform carrier wafer can be torn off leaving bonded platforms behind on the substrate wafer. This allows small form factor merging of the two different technologies.
18 US6673697 2004/01/06 Intel Corporation Santa Clara CA [US] Packaging microelectromechanical structures A2 DB02 DFX PG04 1 第一と第二の半導体構造が結合されて形成されたハーメチック・キャビティーの中にMEMSが収納される。結合ははんだでシールされ、キャビティー周辺全体に渡る。 A microelectromechanical system may be enclosed in a hermetic cavity defined by joined first and second semiconductor structures. The joined structures may be sealed by a solder sealing ring which extends completely around the cavity. One of the semiconductor structures may have the system formed thereon and an open area may be formed underneath said system. That open area may be formed from the underside of the structure and may be closed by covering with a suitable film in one embodiment.
19 US6674159 2004/01/06 Sandia National Laboratories Albuquerque NM [US] Bi-level microelectronic device package with an integral window A2 DAX DDX PH04 MF05 3A MEMSの収納用の集積化された開口部を有するパッケージに関するもので、前記集積化された開口部はパッケージと開口部の間の密着層を分離する層を用いることなく、パッケージに直接ボンディングされる。 A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip CCD chip CMOS chip VCSEL chip laser diode MEMS device or IMEMS device. The multilayered package can be formed of a LTCC or HTCC cofired ceramic material with the integral window being simultaneously joined to the package during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded so that the light-sensitive side is optically accessible through the window. The package has at least two levels of circuits for making electrical interconnections to a pair of microelectronic devices. The result is a compact low-profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device(s).
20 US6750521 2004/06/15 Delphi Technologies Inc. Troy MI [US] Surface mount package for a micromachined device A2 DEX 4 半導体デバイス及び該半導体デバイスとMEMSとを回路基板に直接、表面マウントさせる方法を提供する。キャッピング用チップはデバイスチップとボンディングされ、その中にMEMSを収納する。 A semiconductor device and method by which a device chip with a micromachine is directly surface mounted to a circuit board. A capping chip is bonded to the device chip and encloses the micromachine. The capping chip has a first surface facing the device chip an oppositely-disposed second surface and electrical interconnects through the capping chip between the first and second surfaces. The electrical interconnects electrically communicate with runners on the device chip that are electrically connected to the micromachine thereby providing a signal path from the micromachine to the exterior of the device. The capping chip further includes bond pads for electrical communication with the electrical interconnects. With the bond pads the capping chip can be surface mounted to a circuit board by reflowing solder bumps formed on the bond pads. Depending on the placement of the bond pads on the capping chip the semiconductor device can be mounted to the circuit board with the capping chip between the device chip and circuit board or the semiconductor device can be mounted with one side of the device attached to the circuit board.
21 US6750775 2004/06/15
Integrated sensor having plurality of released beams for sensing acceleration and associated methods A2 DD01 DEX 1 予め定められた方向の加速度をセンシングする集積回路及びその製法を提供する。開放された梁が集積化された構造であり、スイッチ検出回路を含み、それらの回路は隣接している構造を有する。 An integrated circuit and method are provided for sensing activity such as acceleration in a predetermined direction of movement. The integrated released beam sensor preferably includes a switch detecting circuit region and a sensor switching region connected to and positioned adjacent the switch detecting circuit region. The sensor switching region preferably includes a plurality of floating contacts positioned adjacent and lengthwise extending outwardly from said switch detecting circuit region for defining a plurality of released beams so that each of said plurality of released beams displaces in a predetermined direction responsive to acceleration. The plurality of released beams preferably includes at least two released beams lengthwise extending outwardly from the switch detecting circuit region to different predetermined lengths and at least two released beams lengthwise extending outwardly from the switch detecting circuit region to substantially the same predetermined lengths. The methods of forming an integrated sensor advantageously are preferably compatible with know integrated circuit manufacturing processes such as for CMOS circuit manufacturing with only slight variations therefrom.
22 US6756138 2004/06/29 Sensonor ASA Horten [NO] Micro-electromechanical devices A2 DFX PG01 5 MEMSの構造に関するもので、第一の層、またはその構造物は一つ以上の電極、導電層の機能を有し、第二の層は、一つ以上の押し付けコンタクト、またはワイヤコンタクト、またはワイヤボンドパッドを有する。第一の層は比較的硬く、第二の層は比較的柔らかい。 A device having electrical and mechanical components. The device comprises multiple layers in which: a first layer or set of layers arranged is to function as one or more electrodes or conductors; and a second layer is arranged to function as one or more press contracts or wire contacts or wire bond pads. The second layer has different physical properties than the first layer wherein the first layer or set of layers is relatively hard or tough and the second layer is relatively soft or malleable. A corresponding method is provided.
23 US6767757 2004/07/27 Samsung Electronics Company Ltd. Suwon-si [JP] High-vacuum packaged microgyroscope and method for manufacturing the same A2 DD02 PA01 PG01 MA02 MD01 MD04 2 物体の角速度を検出する真空パッケージされたマイクロジャイロスコープとその製法に関するもので、前記ジャイロスコープは信号処理のASIC回路が形成された基板とともに真空パッケージされており、前記回路基板は別の基板のジャイロスコープのサスペンション構造の上にフリップチップの形でマウントされている。 A high-vacuum packaged microgyroscope for detecting the inertial angular velocity of an object and a method for manufacturing the same. In the high-vacuum packaged microgyroscope a substrate with an ASIC circuit for signal processing is mounted onto another substrate including a suspension structure of a microgyroscope in the form of a flip chip. Also the electrodes of the suspension structure and the ASIC circuit can be exposed to the outside through polysilicon interconnection interposed between double passivation layers. The short interconnection between the suspension structure and the ASIC circuit can reduce the device in size and prevents generation of noise thereby increasing signal detection sensitivity. In addition by sealing the two substrates at low temperatures for example at 363 to 400 deg. C. using co-melting reaction between metal for example Au and Si in a vacuum the degree of vacuum in the device increases.
24 US6767758 2004/07/27 Analog Devices Inc. Norwood MA [US] Micro-machined device structures having on and off-axis orientations A2 DD01 DDX MA01 1 一軸の加速度と二軸の角速度センサーを有するMEMSマルチセンサーの製法に関するもので、犠牲層材料または構造物材料を基板表面上に成膜し、マスクプロセスによりパターン形成される工程を含む。 A micro-machined multi-sensor that provides 1-axis of acceleration sensing and 2-axes of angular rate sensing. A method of fabricating the micro-machined multi-sensor includes depositing a layer of sacrificial material or structural material onto the substrate surface. The deposited layer of sacrificial or structural material is then masked with a predetermined mask pattern formed using a rectilinear grid having multiple horizontal and vertical spacings. The mask pattern defines the functional components of the sensor device. In the event the multi-sensor includes at least one functional component whose alignment on the substrate is critical to the optimal performance of the sensor the critical component is defined so that its longitudinal axis is substantially parallel to the horizontal or vertical axis of the mask. In the event the multi-sensor includes at least one functional component whose alignment on the substrate surface is not critical to optimal sensor performance the non-critical component may be defined so that its longitudinal axis is not parallel to the horizontal and vertical axes of the mask.
25 US6770503 2004/08/03 The Charles Stark Draper Laboratory Inc. Cambridge MA [US] Integrated packaging of micromechanical sensors and associated control circuits A2 DD01 DD02 PG02 PGX 6 MEMSセンサーが一方の半導体基板に形成され、もう一方の基板にはそのコントロール回路が形成される、前記コントロール回路が形成されたウエハの裏面にはキャビティーが形成され、そのキャビティー内に前記MEMSセンサーが収納されるようにする。 A micromechanical sensor is fabricated on a semiconductor wafer and a control circuit is fabricated on another semiconductor wafer. A cavity is etched on the back side of the control circuit wafer the cavity being formed such that the sensor on the other wafer fits within the cavity when the wafers are brought together in an adjoining relationship. Through-holes are etched through the back side of the control circuit wafer to allow access to electrical contact points and a patterned layer of metal is deposited to form electrical interconnections between the electrical contact points and termination points on the back side of the wafer via the through-holes. The termination points are arranged such that electrical contacts of the sensor contact the termination points when the wafers are placed in the adjoining relationship. The wafers are then cleaned and bonded together in the adjoining relationship. In a typical process the wafers contain multiple sensors and control circuits respectively and thus the bonded wafers are diced to yield individual bonded sensor-circuit pairs. The bonded pairs are then packaged in an integrated-circuit package such as a leadless chip carrier in a known manner.
26 US6770569 2004/08/03 Freescale Semiconductor Inc. Schaumburg IL [US] Low temperature plasma Si or SiGe for MEMS applications A2 DB01 PA02 MA01 MAX 3 MEMS構造の作製法において、配線層を有するCMOS基板に、SiまたはSiGeから選択された材料を用い、プラズマCVD法で作製されたMEMS構造が基板上に形成されることを特徴とする。 A method is provided for making a MEMS structure (69). In accordance with the method a CMOS substrate (51) is provided which has interconnect metal (53) deposited thereon. A MEMS structure is created on the substrate through the plasma assisted chemical vapor deposition (PACVD) of a material selected from the group consisting of silicon and silicon-germanium alloys. The low deposition temperatures attendant to the use of PACVD allow these materials to be used for MEMS fabrication at the back end of an integrated CMOS process.
27 US6773566 2004/08/10 Nanolytics Inc. Raleigh NC [US] Electrostatic actuators for microfluidics and methods for using same A2 DC01 DC02 4a 電解質の液滴移動を誘引する装置であり、前記電解質液滴と混合することのない溶液を満たした内部容量を持つハウジング、および開口部を有し、前記ハウジングを上下のチャンバーに分割するチャンバー内に配置された分散板などを有する。 An apparatus for inducing movement of an electrolytic droplet includes: a housing having an internal volume filled with a liquid immiscible with an electrolytic droplet; a distribution plate positioned within the chamber having an aperture and dividing the housing into upper and lower chambers; a lower electrode positioned below the lower chamber and the aperture in the distribution plate and being separated from the lower chamber by an overlying hydrophobic insulative layer; an upper electrode located above the upper chamber and the aperture of the distribution plate and being separated from the upper chamber by an underlying hydrophobic insulative layer; and first second and third voltage generators that are electrically connected to respectively the lower and upper electrodes and the distribution plate. The voltage generators are configured to apply electrical potentials to the lower and upper electrodes and the distribution plate thereby inducing movement of the electrolytic droplet between the hydrophobic layers.
28 US6774327 2004/08/10 Agilent Technologies Inc. Palo Alto CA [US] Hermetic seals for electronic components A2 DFX PG04 4 ハーメチックシールされた複数の電子デバイスを作製する方法において、第一、第二の基板はウエハボンディングして、エンクロージャーを形成し、その内部に複数の電子デバイスを収納することを特徴とする。 In a method of producing a plurality of hermetically sealed electronic components first and second substrates are wafer bonded to enclose a plurality of electronic components therebetween. The first substrate is then cut to expose first seals on the first substrate and second seals on the second substrate. The first and second seals define perimeters around the plurality of electronic components. Solder is dispensed into the cuts in the first substrate and the solder is then reflowed to join corresponding pairs of first and second seals.
29 US6787804 2004/09/07 AU Optronics Corporation Hsin-Chu [TW] Semiconductor acceleration sensor A2 DD01 MA02 MF01 MF02 MG01 2 半導体加速度センサーであって、非単結晶基板、および稼動部と不動部を有する絶縁性の梁、更に前記ビーム上に形成された少なくともひとつのピエゾ抵抗体などを含む。TFTで構成されたコントロール回路を前記非単結晶性基板に有する。 A semiconductor acceleration sensor includesa non-single-crystal-silicon-based substrate an insulating beam structure having a movable section and a stationary section at least one piezoresistor positioned on the beam structure an insulating supporter positioned on the non-single-crystal-silicon-based substrate for fixing the stationary section of the beam structure and forming a distance between the beam structure and the non-single-crystal-silicon-based substrate and a thin film transistor (TFT) control circuit positioned on the non-single-crystal-silicon-based substrate and electrically connected to the piezoresistor and the beam structure.
30 US6793829 2004/09/21 Honeywell International Inc. Morristown NJ [US] Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices A2 DFX PG03 9 MEMS及びMEMSをベースにしたデバイスをボンディング、またはパッケージングする方法において、固液相互拡散を用いることを特徴とする。MEMSとMEMSのボンディングは初めにクロム、次に金を成膜した材料によって行われる。 A method of bonding and packaging components of Micro-Electro-Mechanical Systems (MEMS) and MEMS based devices using a Solid-Liquid InterDiffusion (SLID) process is provided. A micro-machine is bonded to a micro-machine chip using bonding materials. A layer of chromium is first deposited onto surfaces of the micro-machine and the micro-machine chip followed by a layer of gold. Subsequently a layer of indium is deposited between the layers of gold and the surface of the micro-machine is pressed against the surface of the micro-machine chip forming a gold-indium alloy to serve as a bond between the micro-machine and the micro-machine chip. In addition a cover is bonded to the micro-machine chip in the same manner providing a hermetic seal for the MEMS based device.
31 US6794725 2004/09/21 Xerox Corporation Stamford CT [US] Amorphous silicon sensor with micro-spring interconnects for achieving high uniformity in integrated light-emitting sources A2 DDX PA02 PB01 PC03 PC05 PE01 PF02 PI03 MA01 MA03 MB03 MD02 MD05 MD06 MF02 10 ハイブリッドの構造体またはデバイスであって、ひとつの基板上に形成され、基板表面と初めから結合した弾性材料を有し、アンカー部は基板表面もしくは自由な部位に固定されている少なくともひとつのマイクロスプリング配線を有することを特徴とする。 A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source. The sensor may also be sufficiently transparent so that light is not blocked from its emission path with a contrast ratio such that it only absorbs a small fraction of light passing therethrough. An additional characteristic is that the manufacturing process is compatible with the manufacturing process for the micro-spring interconnects. Data from the sensor is used as light source correction information. This information is provided to a calibration configuration which allows for calibration of high-speed systems.
32 US6800912 2004/10/05 Corporation for National Research Initiatives Reston VA [US] Integrated electromechanical switch and tunable capacitor and method of making the same A2 DB01 PI03 MA01 MA02 MB01 MB03 MGX 5 モノリシックに形成され、、DCからミリ波までの信号を処理することができるMEMS型μ波スイッチ、および集積化されたMEMS型キャパシターであって、両者は熱力学的あるいは静電気的に可動な梁を含むことを特徴とする。 A monolithically integrated electromechanical microwave switch capable of handling signals from DC to millimeter-wave frequencies and an integrated electromechanical tunable capacitor are described. Both electromechanical devices include movable beams actuated either by thermo-mechanical or by electrostatic forces. The devices are fabricated directly on finished silicon-based integrated circuit wafers such as CMOS BiCMOS or bipolar wafers. The movable beams are formed by selectively removing the supporting silicon underneath the thin films available in a silicon-based integrated circuit technology which incorporates at least one polysilicon layer and two metallization layers. A cavity and a thick low-loss metallization are used to form an electrode above the movable beam. A thick mechanical support layer is formed on regions where the cavity is located or substrate is bulk-micro-machined i.e. etched.
33 US6808955 2004/10/26 Intel Corporation Santa Clara CA [US] Method of fabricating an integrated circuit that seals a MEMS device within a cavity A2 DB01 DD01 PB01 PE01 PG04 PH03 PH04 PI03 MD04 MD06 MD09 ME03 7 MEMSを含む集積回路の製法に関するもので、MEMSを基板上に形成し、前記基板を集積回路にカップリングさせ、MEMSを内包するキャビティーをシールする工程を含むことを特徴とする。 A method of fabricating an integrated circuit that includes a microelectromechanical (MEMS) device. The method includes forming a MEMS device on a substrate and forming an integrated circuit. The method further includes coupling the substrate to the integrated circuit to form a sealed cavity that includes the MEMS device. The substrate and the integrated circuit are coupled together in a controlled environment to establish a controlled environment within the cavity where the MEMS device is located.
34 US6829814 2004/12/14 Delphi Technologies Inc. Troy MI [US] Process of making an all-silicon microphone A2 DB05 DBX PB02 PC01 PC03 PE01 PF02 PG03 PI03 PJ06 MA01 MB01 14 容量型の音響変換器であって、望ましくはすべてシリコンでモノリシックに作製され、ドープされた単結晶シリコン層からなるキャパシターで作製された容量プレートを含むことを特徴とする。 A process of forming a capacitive audio transducer preferably having an all-silicon monolithic construction that includes capacitive plates defined by doped single-crystal silicon layers. The capacitive plates are defined by etching the single-crystal silicon layers and the capacitive gap therebetween is accurately established by wafer bonding yielding a transducer that can be produced by high-volume manufacturing practices.
35 US6829937 2004/12/14 VTI Holding Oy [FI] Monolithic silicon acceleration sensor A2 DB05 DD01 PB01 PC03 PC04 PF01 PG02 PH01 PH02 PJ03 MA01 MA02 MB01 MB03 MDX MGX 1 複数の直交する軸の加速度を検出する、モノリシックにシリコンで形成された加速度センサーであって、MEMS技術によりひとつ、またはそれ以上のセンサーセルを有し、各センサーはシリコン基板に支持されたビームに慣性質量を有している。 A monolithic silicon acceleration sensor capable of detecting acceleration along multiple orthogonal axes of acceleration is disclosed. The monolithic silicon acceleration sensor is micromachined from silicon to form one or more sensor cells each sensor cell having an inertial mass positioned by beam members fixed to a silicon support structure. Movement of the inertial mass due to acceleration is detected by either a differential capacitance measurement between opposing surfaces of the inertial mass and electrically conductive layers on a top and a bottom cover plate structure or by a resistance measurement of piezoresistive elements fixed to the positioning beam members. Embodiments of the invention are capable of detecting acceleration in a plane along two orthogonal axes of acceleration or along three orthogonal axis of acceleration.
36 US6835589 2004/12/28 International Business Machines Corporation Armonk NY [US] Three-dimensional integrated CMOS-MEMS device and process for making the same A2 DBX PB01 PB03 PC02 PC03 PE01 PG04 PI03 PJ06 MA01 MB01、MDX 3 8C MEMSと該MEMSに信号を送るチップが垂直方向に集積されたものであって、MEMSはそれを通じて導電体となるアンカー部で基板に固定され、チップはMEMS基板と法線方向で結合されていることを特徴とする。 A vertically integrated structure includes a micro-electromechanical system (MEMS) and a chip for delivering signals to the MEMS. The MEMS has an anchor portion having a conductor therethrough by which it is connected to a substrate. The chip is attached to the MEMS substrate in a direction normal to the substrate surface so as to make a conductive path from the chip to the MEMS. The chip may be attached by bonding the conductor to C4 metal pads formed on the chip or by bonding the conductor to metal studs on the chip. The MEMS substrate may be thinned before attachment to the chip or may be removed from the underside of the MEMS. A temporary carrier plate is used to facilitate handling of the MEMS and alignment to the chip.
37 US6841453 2005/01/11 STMicroelectronics S.r.l. Agrate Brianza [IT] Process for manufacturing integrated devices having connections on a separate wafer and integrated device thus obtained A2 PG03 FP 集積化デバイスの製法に関するものであり、第一のウエハには半導体材料、および半導体層、分離層がそれぞれ集積された構造を有し、第二のウエハには半導体層、メタルの配線層が形成され、第一のウエハと第二のウエハをボンディングにより結合させる工程を含む。 A process for manufacturing an integrated device comprises the steps of: forming in a first wafer of semiconductor material integrated structures including semiconductor regions and isolation regions; forming on a second wafer of semiconductor material interconnection structures of a metal material including plug elements having at least one bonding region of a metal material capable of reacting with the semiconductor regions of the first wafer; and bonding the first and second wafers together by causing the bonding regions of the plug elements to react directly with the semiconductor regions so as to form a metal silicide. Thereby the metallurgical operations for forming the interconnection structures are completely independent of the operations required for processing silicon so that there is no interference whatsoever between the two sets of operations. In addition the areas where the two wafers are made may be separate and the interconnection structures may be made with materials incompatible with silicon processing without any risk of contamination.
38 US6841838 2005/01/11 HRL Laboratories LLC Malibu CA [US] Microelectromechanical tunneling gyroscope and an assembly for making a microelectromechanical tunneling gyroscope therefrom A2 DD02 PIX FP MEMS型のジャイロスコープの製法に関するものであり、カンチレバー型ビーム、側面電極の第一の位置、及びそのつがい構造が第一の基板に形成され、少なくとも一つのコンタクト構造が側面電極の第二の位置に形成される。 A method of making a micro electromechanical gyroscope. A cantilevered beam structure first portions of side drive electrodes and a mating structure are defined on a first substrate or wafer; and at least one contact structure second portions of the side drive electrodes and a mating structure are defined on a second substrate or wafer the mating structure on the second substrate or wafer being of a complementary shape to the mating structure on the first substrate or wafer and the first and second portions of the side drive electrodes being of a complementary shape to each other. A bonding layer preferably a eutectic bonding layer is provided on at least one of the mating structures and one or the first and second portions of the side drive electrodes. The mating structure of the first substrate is moved into a confronting relationship with the mating structure of the second substrate or wafer. Pressure is applied between the two substrates so as to cause a bond to occur between the two mating structures at the bonding or eutectic layer and also between the first and second portions of the side drive electrodes to cause a bond to occur therebetween. Then the first substrate or wafer is removed to free the cantilevered beam structure for movement relative to the second substrate or wafer. The bonds are preferably eutectic bonds.
39 US6844623 2005/01/18 Sandia Corporation Albuquerque NM [US] Temporary coatings for protection of microelectronic devices during packaging A2 PHX 3A マイクロエレクトロニクスデバイスを、パッケージングの際に保護する方法であって、デバイスの敏感な部分(MEMS)に水に不溶の一時的な保護コーティングをするステップと少なくとも一回のパッケージングをするステップと好ましくはドライエッチングで前記コーティングを剥離するステップとを含む。 The present invention relates to a method of protecting a microelectronic device during device packaging including the steps of applying a water-insoluble temporary protective coating to a sensitive area on the device; performing at least one packaging step; and then substantially removing the protective coating preferably by dry plasma etching. The sensitive area can include a released MEMS element. The microelectronic device can be disposed on a wafer. The protective coating can be a vacuum vapor-deposited parylene polymer silicon nitride metal (e.g. aluminum or tungsten) a vapor deposited organic material cynoacrylate a carbon film a self-assembled monolayered material perfluoropolyether hexamethyldisilazane or perfluorodecanoic carboxylic acid silicon dioxide silicate glass or combinations thereof. The present invention also relates to a method of packaging a microelectronic device including: providing a microelectronic device having a sensitive area; applying a water-insoluble protective coating to the sensitive area; providing a package; attaching the device to the package; electrically interconnecting the device to the package; and substantially removing the protective coating from the sensitive area.
40 US6844959 2005/01/18 Reflectivity Inc Sunnyvale CA [US] Spatial light modulators with light absorbing areas A2 DAX FP プロジェクター、空間光変調器、及びそのマイクロミラーの製法に関するものであって、光変調器のアレイ中に配列され、静電気的に偏向するマイクロミラー素子用の回路や電極を含む基板を用いる。 A projection system a spatial light modulator and a method for forming micromirrors are disclosed. A substrate comprises circuitry and electrodes for electrostatically deflecting micromirror elements that are disposed within an array of such elements forming the spatial light modulator. In one embodiment the substrate is a silicon substrate having circuitry and electrodes thereon for electrostatically actuating adjacent micromirror elements and the substrate is fully or selectively covered with a light absorbing material.
41 US6846690 2005/01/25 STMicroelectronics S.A. Montrouge [FR] Integrated circuit comprising an auxiliary component for example a passive component or a microelectromechanical system placed above an electronic chip and the corresponding fabrication process A2 PGX FP 集積化デバイスの製法であって、まず初めに電子回路チップを、次に前記チップ上に予備デバイスを形成し、前記予備デバイス上に保護膜を形成することを特徴とする。 The fabrication of an integrated circuit includes a first phase of producing an electronic chip and a second phase of producing at least one auxiliary component placed above the chip and of producing a protective cover which covers the auxiliary component. The first phase of producing the chip is effected from a first semiconductor substrate and comprises the formation of a cavity lying in a chosen region of the chip and emerging at the upper surface of the chip. The second production phase includes the production of the auxiliary component from a second semiconductor substrate separate from the first and then the placement in the cavity of the auxiliary component supported by the second substrate and the mutual adhesion of the second substrate to the upper surface of the chip lying outside the cavity. The second substrate then also forms the protective cover.
42 US6861205 2005/03/01 Battelle Memorial Institute Richland WA [US] Three dimensional microstructures and method of making A2 PE01 MEX FP 複雑な三次元の微小構造の製法であって、外部の刺激を感光性の材料の第一の層に与えて、該第一層にボイドを形成し、このボイド中の材料を除去する。その後、犠牲材料を少なくとも前記ボイドに満たすことを含む。 A method of forming complex three-dimensional microstructures wherein an external stimulus is applied to a first layer of a photosensitive material thereby creating voids in the first layer and any material present in those voids is removed. A sacrificial material is then provided within at least a portion of the voids. This sacrificial layer fills the voids either in whole or in part and enables a second layer of photosensitive material to be stacked upon the first while still preserving the pattern formed in the first layer. Once the sacrificial layer has been applied a second layer of photosensitive material may then be stacked onto the first. Successive layers of photosensitive material and sacrificial material may be added until a final complex three-dimensional structure is created. The sacrificial material may then be removed with a solvent such as carbon dioxide.
43 US6861277 2005/03/01 Hewlett-Packard Development Company L.P. Houston TX [US] Method of forming MEMS device A2 PI02 FP MEMSの製法に関するものであって、基板上に導電層を形成し、前記導電層上に第一の犠牲層を形成し、その犠牲層の表面を平坦にし、その上に第一の素子を形成し、前記犠牲層を通して、第一の素子と前記導電層の導通を取ることを含む。 A method of forming a MEMS device includes depositing a conductive material on a substructure forming a first sacrificial layer over the conductive material including forming a substantially planar surface of the first sacrificial layer and forming a first element over the substantially planar surface of the first sacrificial layer including communicating the first element with the conductive material through the first sacrificial layer. In addition the method includes forming a second sacrificial layer over the first element including forming a substantially planar surface of the second sacrificial layer forming a support through the second sacrificial layer to the first element after forming the second sacrificial layer including filling the support and forming a second element over the support and the substantially planar surface of the second sacrificial layer. As such the method further includes substantially removing the first sacrificial layer and the second sacrificial layer thereby supporting the second element relative to the first element with the support.
44 US6865944 2005/03/15 Honeywell International Inc. Morristown NJ [US] Methods and systems for decelerating proof mass movements within MEMS structures A2 DD02 FP MEMSデバイスであって、少なくともひとつのアンカー、少なくともひとつの減速方向に拡張したり、減速方向を示すなどする試験質量、モータドライブ櫛状電極、モータセンス櫛状電極を有する基板を含むことを特徴とする。 A micro-electromechanical systems (MEMS) device is described which includes a substrate having at least one anchor a proof mass having either of at least one deceleration extension extending from the proof mass or at least one deceleration indentation formed in the proof mass a motor drive comb and a motor sense comb. The MEMS device further includes a plurality of suspensions configured to suspend the proof mass over the substrate and between the motor drive comb and the motor sense comb and the suspensions are anchored to the substrate. The MEMS device also includes a body attached to the substrate and at least one deceleration beam extending from the body. The deceleration extensions are configured to engage either deceleration beams or deceleration indentations and slow or stop the proof mass before it contacts either of the motor drive comb or the motor sense comb.
45 US6878567 2005/04/12 Intel Corporation Santa Clara CA [US] Method and apparatus for fabrication of passivated microfluidic structures in semiconductor substrates A2 PAX FP パッシベートされたマイクロ流路構造を製造する機器と方法であって、マイクロ流路を備えた基板と前記埋め込まれたマイクロ流路が熱によりパッシベートされる工程を含む。 A method and apparatus for fabrication of passivated microfluidic structures is disclosed. The method includes providing a substrate having a microfluidic structure formed therein. The microfluidic structure is embedded by an embedding layer. The method further includes passivating the embedded microfluidic structure by locally heating the microfluidic structure surface in a reactive atmosphere wherein the passivated microfluidic structure is suitable for transporting a fluid.
46 US6878626 2005/04/12 Analog Devices Inc. Norwood MA [US] TiW platinum interconnect and method of making the same A2 PIX FP 集積化MEMSの電気的コンタクト構造に使用されるメタルスタック構造に関するものであり、TiWと密着層兼バリアメタルとその最上部に形成された白金からなり、、白金は酸化膜ハードマスクを用いて、まずウェットエッチングを行い、その後、スパッタエッチングを用いて形成する。 A metallization stack is provided for use as a contact structure in an integrated MEMS device. The metallization stack includes a titanium-tungsten adhesion and barrier layer formed with a platinum layer formed on top. The platinum feature is formed by sputter etching the platinum in argon followed by a wet etch in aqua regia using an oxide hardmask. Alternatively the titanium-tungsten and platinum layers are deposited sequentially and patterned by a single plasma etch process with a photoresist mask.
47 US6880235 2005/04/19 Intel Corporation Santa Clara CA [US] Method of forming a beam for a MEMS switch A2 DB01 MD07 MD09 MD10 FP 高い共鳴周波数のビーム(梁)を有するMEMSスイッチであり、第一及び第二の離れた電気的コンタクトと可動性の電極を有し、電極の電位による静電気的な変位により、電気的なコンタクトを得る。 A microelectromechanical system (MEMS) switch having a high-resonance-frequency beam is disclosed. The MEMS switch includes first and second spaced apart electrical contacts and an actuating electrode. The beam is adapted to establish contact between the electrodes via electrostatic deflection of the beam as induced by the actuating electrode. The beam may have a cantilever or bridge structure and may be hollow or otherwise shaped to have a high resonant frequency. Methods of forming the high-speed MEMS switch are also disclosed.
48 US6892582 2005/05/17 Hitachi Ltd. Tokyo [JP] Hitachi Car Engineering Company Ltd. Hitachinaka [JP] Semiconductor pressure sensor and pressure sensing device A2 DD03 PI02 FP 圧力センサーに関するものであって、各チャンネルのシーリング構造が湿気の浸透の防止に優れ、圧力センサー中のダイヤフラムの一時的な変化に対しても耐久性を有する。前記センサーは犠牲層プロセスで作製される。 The object of the present invention is to propose an etch channel sealing structure characterized by excellent impermeability to moisture and resistance to temporal change of the diaphragm in the pressure sensor produced according to the sacrificial layer etching technique and to provide a pressure sensor characterized by excellent productivity and durability. After a very small gap is formed by the sacrificial layer etching technique silicon oxide film is deposited by the CVD technique or the like thereby sealing the etch channel. Further impermeable thin film of polysilicon or the like is formed to cover the oxide film. This allows an etch channel sealing structure to be simplified in the pressure sensor produced according to the sacrificial layer etching technique and prevents entry of moisture into the cavity thereby improving moisture resistance. Moreover sealing material with small film stress reduces temporal deformation of the diaphragm.
49 US6897551 2005/05/24 SAES Getters S.p.A. Milan [IT] Support for microelectronic microoptoelectronic or micromechanical devices A2 PI01 FP マイクロエレクトロニクス、マイクロオプトエレクトロニクス、MEMSなどのデバイスを製造する際の機器であって、汚染を吸収する層を設けることで、デバイスの寿命や操作性を改良させる。 The specification teaches a device for use in the manufacturing of microelectronic microoptoelectronic or micromechanical devices (microdevices) in which a contaminant absorption layer improves the life and operation of the microdevice. In a preferred embodiment the invention includes a mechanical supporting base and discrete deposits of gas absorbing or contaminant removing material on the base by a variety of techniques and a layer for temporary protection of the contaminant removing material on top of the contaminant removing material. Passages are created in the layer which expose the contaminant removing material to atmosphere. The device may be used as a covering for the microdevice as well.
50 US6900072 2005/05/31 Reflectivity Inc. Sunnyvale CA [US] Method for making a micromechanical device by using a sacrificial substrate A2 PI01 13G 全体的かその一部の工程に、第一の基板に少なくともひとつ以上のMEMS構造を多数構築するMEMSデバイスの製造方法であって、第二の基板を少なくともひとつ以上のデバイスを有する多数の領域をカバーするように、第一の基板にボンディングする工程を含む。 A method is disclosed for forming a micromechanical device. The method includes fully or partially forming one or more micromechanical structures multiple times on a first substrate. A second substrate is bonded onto the first substrate so as to cover the multiple areas each having one or more micromechanical structures so as to form a substrate assembly. The substrate assembly is then separated into individual dies each die having the one or more micromechanical structures held on a portion of the first substrate with a portion of the second substrate bonded to the first substrate portion. Finally the second substrate portion is removed from each die to expose the one or more micromechanical structures on the first substrate portion. The invention is also directed to a method for forming a micromechanical device including: forming one or more micromechanical structures in one or more areas on a first substrate; bonding caps onto the first substrate so as to cover the one or more areas each having one or more micromechanical structures so as to form a substrate assembly; after a period of time removing the caps to expose the one or more micromechanical structures. During the period of time between bonding the caps and later removing the caps the substrate assembly can be singulated inspected irradiated annealed die attached shipped and/or stored.
51 US6906392 2005/06/14 paragon Delbruck [DE] Micromechanical component A2 PI02 4 基板と基板上に形成されたカバー層からなるMEMSであって、カバー層の下には機械的に基板を支持し、熱的には遮断された多孔質材料が存在し、カバー層上には該カバー層を加熱するヒータが存在することを特徴とする。 A micromechanical component includes a substrate and a cover layer deposited on the substrate underneath the cover layer a region of porous material being provided which mechanically supports and thermally insulates the cover layer. On the cover layer a heating device is provided to heat the cover layer above the region; and above the region a detector is provided to measure an electric property of a heated medium provided above the region on the cover layer.
52 US6906847 2005/06/14 Reflectivity INC Sunnyvale CA [US] Spatial light modulators with light blocking/absorbing areas A2 DAX PI02 1E プロジェクター、空間光変調器、及びそのマイクロミラーの製法に関するものであって、光変調器はふたつの基板がウエハレベルでボンディングされた構造であり、その一方の基板にはマイクロミラーアレイが形成されている。 A projection system a spatial light modulator and a method for forming a micromirror array such as for a projection display are disclosed. The spatial light modulator can have two substrates bonded together with one of the substrates comprising a micro-mirror array. The two substrates can be bonded at the wafer level after depositing a getter material and/or solid or liquid lubricant on one or both of the wafers if desired. In one embodiment of the invention one of the substrates is a light transmissive substrate and a light absorbing layer is provided on the light transmissive substrate to selectively block light from passing through the substrate. The light absorbing layer can form a pattern such as a frame around an array of micro-mirrors.
53 US6906850 2005/06/14 Texas Instruments Incorporated Dallas TX [US] Capacitively coupled micromirror A2 DA04 1 容量結合されたMEMSデバイスであって、半導体基板、少なくともふたつの状態のどちらかに偏向可能な機能、電位信号に選択的に接続可能なスイッチ、からなることを特徴とする。 A capacitively coupled microelectromechanical device comprising: a semiconductor substrate; a member operable to deflect to either of at least two states; and a switch for selectively connecting the member to a voltage signal. When a logic high signal is stored on memory capacitor mirror transistor is turned on grounding the mirror structure. When a logic low signal is stored on the memory capacitor the mirror transistor is turned off allowing the mirror to float electrically. Mirrors that are tied to a voltage potential which typically are grounded are affected by a reset pulse and rotate away from their landed position. When the mirrors have rotated to the opposite side a bias signal is applied to hold the repositioned mirror in place in the opposite state. Mirrors that electrically are floating do not experience the forces generated by the reset voltage and remain in their previous state.
54 US6912082 2005/06/28 Palo Alto Research Center Incorporated Palo Alto CA [US] Integrated driver electronics for MEMS device using high voltage thin film transistors A2 DBX PI01 FP 電気的に稼動なMEMSデバイスを集積する機器であって、高電位で駆動する電子デバイスがひとつの基板上に形成され、前記電子デバイスはオフセットゲート型の高電位TFT(HVTFTs)であり、MEMSデバイスを駆動させることを特徴とする。 An apparatus integrating electrostatically actuated MEMS devices and high voltage driver (actuator) electronics on a single substrate where the driver electronics utilize offset-gate high voltage thin-film transistors (HVTFTs) that facilitate the transmission of high actuating voltages using relatively low control voltages thereby facilitating the formation of large arrays of electrostatically-actuated MEMS devices. The driver circuit is arranged such that the high actuating voltage is applied to an actuating electrode of the actuated MEMS device and drain electrode of the HVTFT when the HVTFT is turned off thereby minimizing dielectric breakdown. When the HVTFT is turned on in response to the relatively low control voltage the high actuating voltage is discharged to ground from the drain (offset) electrode to the source (not offset) electrode.
55 US6916728 2005/07/12 Freescale Semiconductor Inc. Schaumburg IL [US] Method for forming a semiconductor structure through epitaxial growth A2 PI01 FP MEMS構造の製法であって、基板、単結晶半導体層からなり、前記基板と半導体層の間に形成された第一の絶縁材料からなる犠牲層を有し、前記半導体層と犠牲層に渡って開口部を設け、前記基板を露出する工程を含む。 A method for creating a MEMS structure is provided. In accordance with the method an article is provided which comprises a substrate (101) and a single crystal semiconductor layer (105) and having a sacrificial layer (103) comprising a first dielectric material which is disposed between the substrate and the semiconductor layer. An opening (107) is created which extends through the semiconductor layer (105) and the sacrificial layer (103) and which exposes a portion of the substrate (101). An anchor portion (109) comprising a second dielectric material is then formed in the opening (107). Next the semiconductor layer (105) is epitaxially grown to a suitable device thickness thereby forming a device layer (111).
56 US6917459 2005/07/12 Hewlett-Packard Development Company L.P. Houston TX [US] MEMS device and method of forming MEMS device A2 PI01 FP MEMSデバイスの製法であって、ベース材料と該ベース材料の第一の表面に形成された少なくともひとつの導電性材料からなり、導電性材料の上に絶縁層を形成し、前記絶縁層の上にカバー層を形成し、更にMEMSと電気的接続を取るために、それらに開口部を設けることを含む。 A method of forming a MEMS device includes providing a substructure including a base material and at least one conductive layer formed on a first side of the base material forming a dielectric layer over the at least one conductive layer of the substructure forming a protective layer over the dielectric layer defining an electrical contact area for the MEMS device on the protective layer and forming an opening within the electrical contact area through the protective layer and the dielectric layer to the at least one conductive layer of the substructure.
57 US6927482 2005/08/09 General Electric Company Plainville CT [US] Surface mount package and method for forming multi-chip microsensor device A2 PH05 FP マルチチップデバイスの表面マウント型のパッケージであって、第一および第二のダイ・パッドとともに形成されたリードフレーム、それぞれのダイ・パッドからのリードアウトを含む。環境のセンサーチップが第一のパッドに、環境と分離されたチップが第二のパッドにマウントされる。 A surface mount package for a multi-chip device has a leadframe formed with first and second die pads and leadouts from the respective die pads. An environmentally responsive sensor chip is secured to the first die pad and an environmentally isolated chip is secured to the second die pad. The chips are electrically coupled through the lead frame. A body formed with an over molded portion encases the isolated chip and an open molded portion formed with a recess receives the environmentally sensitive chip. An apertured cover is secured in the recess to form a protective covering over the sensor chip and for allowing communication of the sensor chip externally of the package.
58 US6930368 2005/08/16 Hewlett-Packard Development Company L.P. Houston TX [US] MEMS having a three-wafer structure A2 DFX FP MEMSデバイスであって、第一のウエハ、可動部を有する第二の基板、および第三のウエハを有し、可動部は第一と第三のウエハ間で可動し、これら、第一、第二、第三のウエハはボンディングされている。 A microelectromechanical system includes a first wafer a second wafer including a moveable portion and a third wafer. The movable portion is movable between the first wafer and the third wafer. The first wafer the second wafer and the third wafer are bonded together.
59 US6933163 2005/08/23 Analog Devices Inc. Norwood MA [US] Fabricating integrated micro-electromechanical systems using an intermediate electrode layer A2 PI01 FP 集積化されたMEMSデバイスを中間電極を用いて製造する方法に関するもので、前記中間電極は集積回路ウエハに形成されており、MEMSウエハにはマイクロ光学ミラーが形成されており、前記集積回路ウエハとボンディングされる。 An intermediate electrode layer is used to fabricate an integrated micro-electromechanical system. An intermediate electrode layer is formed on an integrated circuit wafer. The intermediate electrode layer places drive electrodes a predetermined height above the surface of the integrated circuit wafer. A micro-electromechanical system wafer having micromachined optical mirrors is bonded to the integrated circuit wafer such that the drive electrodes are positioned a predetermined distance from the optical mirrors.
60 US6936491 2005/08/30 Robert Bosch GmbH Stuttgart [DE] Method of fabricating microelectromechanical systems and devices having trench isolated contacts A2 PI02 FP MEMSデバイス、およびその製法に関するもので、最終的にパッケージする前にMEMSデバイスを内包する空間を有し、前記空間の少なくとも一部に外部とのコンタクトを取る開口部を有する。 There are many inventions described and illustrated herein. In one aspect the present invention is directed to a MEMS device and technique of fabricating or manufacturing a MEMS device having mechanical structures encapsulated in a chamber prior to final packaging and a contact area disposed at least partially outside the chamber. The contact area is electrically isolated from nearby electrically conducting regions by way of dielectric isolation trench that is disposed around the contact area. The material that encapsulates the mechanical structures when deposited includes one or more of the following attributes: low tensile stress good step coverage maintains its integrity when subjected to subsequent processing does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition) and/or facilitates integration with high-performance integrated circuits. In one embodiment the material that encapsulates the mechanical structures is for example silicon (polycrystalline amorphous or porous whether doped or undoped) silicon carbide silicon-germanium germanium or gallium-arsenide.
61 US6936918 2005/08/30 Analog Devices Inc. Norwood MA [US] MEMS device with conductive path through substrate A2 PIX FP MEMSデバイスであって、前記MEMS構造が形成されている基板の最上面から最下部まで拡張した、少なくともひとつの導電経路を有し、該少なくともひとつの導電経路により最上部から最下部まで電気的に導通されている。 A MEMS device has at least one conductive path extending from the top facing side of its substrate (having MEMS structure) to the bottom side of the noted substrate. The at least one conductive path extends through the substrate as noted to electrically connect the bottom facing side with the MEMS structure.
62 US6943448 2005/09/13 Akustica Inc. Pittsburgh PA [US] Multi-metal layer MEMS structure and process for making the same A2 PI01 FP 通常のCMOSプロセスを使用して作製した金属膜と犠牲層が交互に積層された多層構造とその製法、その構造を用いたデバイスの製法に関するものであって、これらを用いて、マイクロマシーンメッシュを作製する。 The present invention is directed to a structure comprised of alternating layers of metal and sacrificial material built up using standard CMOS processing techniques a process for building such a structure a process for fabricating devices from such a structure and the devices fabricated from such a structure. In one embodiment a first metal layer is carried by a substrate. A first sacrificial layer is carried by the first metal layer. A second metal layer is carried by the sacrificial layer. The second metal layer has a portion forming a micro-machined metal mesh. When the portion of the first sacrificial layer in the area of the micro-machined metal mesh is removed the micro-machined metal mesh is released and suspended above the first metal layer a height determined by the thickness of the first sacrificial layer. The structure may be varied by providing a base layer of sacrificial material between the surface of the substrate and the first metal layer. In that manner a portion of the first metal layer may form a micro-machined mesh which is released when a portion of the base sacrificial layer in the area of the micro-machined mesh is removed. Additionally a second layer of sacrificial material and a third metal layer may be provided. A micro-machined mesh may be formed in a portion of the third metal layer. The structure of the present invention may be used to construct variable capacitors switches and when certain of the meshes are sealed microspeakers and microphones.
63 US6951768 2005/10/04 HRL Laboratories LLC Malibu CA [US] Single crystal dual wafer tunneling sensor or switch with substrate protrusion and a method of making same A2 DB01 DDX PI01 FP MEMSスイッチ、トンネリングセンサーの製法に関するもので、カンチレバー状のビーム構造、ひとつのつがい構造が第一の基板またはウエハに形成されて、第二の基板またはウエハには少なくともひとつのコンタクト構造、ひとつのつがい構造が形成されている。 A method of making a micro electromechanical switch or tunneling sensor. A cantilevered beam structure and a mating structure are defined on a first substrate or wafer; and at least one contact structure and a mating structure are defined on a second substrate or wafer the mating structure on the second substrate or wafer being of a complementary shape to the mating structure on the first substrate or wafer. At least one of the mating structures includes a protrusion extending from a major surface of at least one of said substrates. A bonding layer preferably a eutectic bonding layer is provided on at least one of the mating structures. The mating structure of the first substrate is moved into a confronting relationship with the mating structure of the second substrate or wafer. Pressure is applied between the two substrates so as to cause a bond to occur between the two mating structures at the bonding or eutectic layer. Then the first substrate or wafer is removed to free the cantilevered beam structure for movement relative to the second substrate or wafer.
64 US6953982 2005/10/11 California Institute of Technology Pasadena CA [US] Flexible skin incorporating MEMS technology A2 PHX 2C ポリイミド膜に内包されたシリコンの島状態からなるフレキシブルなスキン状構造であって、シリコンの島状態にはMEMSデバイスが含まれており、お互いにポリイミド膜(好ましくは1〜100μm厚)により結合されている。 A flexible skin formed of silicon islands encapsulated in a polyimide film. The silicon islands preferably include a MEMS device and are connected together by a polyimide film (preferably about 1–100 mu m thick). To create the silicon islands silicon wafers are etched to a desirable thickness (preferably about 10–500 mu m) by Si wet etching and then patterned from the back side by reactive ion etching (RIE).
65 US6956268 2005/10/18 Reveo Inc. Elmsford NY [US] MEMS and method of manufacturing MEMS A2 PGX FP MEMS及びMEMSの製法に関するもので、とりわけ垂直方向に集積したものであり、これらの集積化は好ましくはウエハレベルで行われ、基板に結合したMEMS上に複数のMEMSが形成されるものである。 The present invention relates to micro electro-mechanical systems (MEMS) and production methods thereof and more particularly to vertically integrated MEMS systems. Manufacturing of MEMS and vertically integrated MEMS is facilitated by forming preferably on a wafer level plural MEMS on a MEMS layer selectively bonded to a substrate and removing the MEMS layer intact.
66 US6956274 2005/10/18 Analog Devices Inc. Norwood MA [US] TiW platinum interconnect and method of making the same A2 PI01 FP 集積化MEMSの電気的コンタクト構造に使用されるメタルスタック構造に関するものであり、前記スタック構造はTiW密着層兼バリア膜とその最上部に形成された白金であり、白金は酸化膜ハードマスクを用いて、まずウェットエッチングを行い、その後、スパッタエッチングを用いて形成する。 A metallization stack is provided for use as a contact structure in an integrated MEMS device. The metallization stack comprises a titanium-tungsten adhesion and barrier layer formed with a platinum layer formed on top. The platinum feature is formed by sputter etching the platinum in argon followed by a wet etch in aqua regia using an oxide hardmask. Alternatively the titanium-tungsten and platinum layers are deposited sequentially and patterned by a single plasma etch process with a photoresist mask.
67 US6958123 2005/10/25 Reflectivity INC Sunnyvale CA [US] Method for removing a sacrificial material with a compressed fluid A2 PI02 1E 基板上に有機化合物(犠牲層)を堆積させ、その後、その上に前記有機化合物とは別の材料を追加形成し、前記有機化合物層を高圧の流体で除去する。また、この有機化合物の除去の後に高圧流体で貼り付き防止層を形成することも含まれる。 A method comprises depositing an organic material on a substrate; depositing additional material different from the organic material after depositing the organic material; and removing the organic material with a compressed fluid. Also disclosed is a method comprising: providing an organic layer on a substrate; after providing the organic layer providing one or more layers of a material different than the organic material of the organic layer; removing the organic layer with a compressed fluid; and providing an anti-stiction agent with a compressed fluid to material remaining after removal of the organic layer.
68 US6960488 2005/11/01 The Regents of the University of California Oakland CA [US] Method of fabricating a microfabricated high aspect ratio device with electrical isolation A2 DB04 DC02 DD01 DD02 DEX PA06 PB02 MA01 1 垂直方向の大きいアスペクト・レシオを有し、構造物領域と回路領域の電気的な分離性を有するマイクロデバイスに関するもので、ひとつの基板に形成され、構造物領域と回路領域の導通部を有するものである。 A microfabricated device having a high vertical aspect ratio and electrical isolation between a structure region and a circuit region. The device may be fabricated on a single substrate and may include electrical interconnections between the structure region and the circuit region. The device includes a substrate and an isolation trench surrounding a structure region in the substrate. The isolation trench includes a lining of a dielectric insulative material. A plurality of microstructure elements are located in the structure region and are laterally anchored to the isolation trench.
69 US6960536 2005/11/01 Robert Bosch GmbH Stuttgart [DE] Method for producing integrated microsystems A2 DB01 PB03 PC02 1 マイクロシステムの製法に関するもので、基板上に形成され、その第一の機能部は導電層と補助層を含み、第一の機能部上には第二の機械的な機能部を有し、前記第二の機能部は第一の機能部上に形成された犠牲層上にまず形成されている。 A method for producing a microsystem that has situated on a substrate a first functional layer that includes a conductive area and a sublayer. Situated on the first functional layer is a second mechanical functional layer which is first initially applied onto a sacrificial layer situated and structured on the first functional layer. In addition a layer is situated on the side of the sublayer facing away from the conductive area. The layer constitutes a protective layer on the first functional layer that acts in areas during a sacrificial layer etching process so that during removal of the sacrificial layer no etching of the areas of the first functional layer covered by the protective layer occurs and that in the region of the areas of the first functional layer implemented without the protective layer the sublayer is removed essentially selectively to the conductive area at the same time as the sacrificial layer. Further a method is described for producing integrated microsystems having silicon-germanium functional layers sacrificial layers containing germanium and open metal surfaces. The sacrificial layers containing germanium are at least partially removed in an etching solution a pH value of the etching solution being kept at least approximately neutral during the etching procedure using a buffer.
70 US6961257 2005/11/01 Movaz Networks Inc. Norcross GA [US] Content addressable control system A2 DA04 DFX 3 MEMS中に形成された、例えば、光学スイッチとして使用できる静電気的なアクチュエーターのアレイにとりわけ応用可能なパルス幅変調コントロールおよび駆動回路であって、その高電位部はMEMS素子に垂直に配列された駆動セルを含む集積回路と結合されている。 Pulse-width modulation (PWM) control and drive circuitry particularly applicable to an array of electrostatic actuators formed in a micro electromechanical system (MEMS) such as used for optical switching. The high-voltage portion may be incorporated in an integrated circuit having drive cells vertically aligned with the MEMS elements. A control cell associated with each actuator includes a register selectively stored with a desired pulse width. A clocked counter distributes its outputs to all control cells. When the counter matches the register a polarity signal corresponding to a drive clock is latched and controls the voltage applied to the electrostatic cell. The MEMS element may be a tiltable plate supported in its middle by a torsion beam. Complementary binary signals may drive two capacitors formed across the axis of the beam. The register and comparison logic for each cell may be formed by a content addressable memory.
71 US6964882 2005/11/15 Analog Devices Inc. Norwood MA [US] Fabricating complex micro-electromechanical systems using a flip bonding technique A2 DFX PH04 6 複合MEMSを製造するためのフリップ・ボンディング技術であって、種々のMEMS構造が2枚のウエハのそれぞれ前面に形成され、一方のウエハが他方に、それぞれ前面を向い合わせて、フリップ・ボンディングされる。 A flip-bonding technique is used to fabricate complex micro-electromechanical systems. Various micromachined structures are fabricated on the front side of each of two wafers. One of the wafers is flipped over and bonded to the other wafer so that the front sides of the two wafers are bonded together in a flip-stacked configuration.
72 US6780672 2004/08/24 Lockheed Martin Corporation Bethesda MD [US] Micro eletro-mechanical component and system architecture A2 A3 DA01 DDX DFX 4 少なくともひとつの集積回路を含むMEMS部の製法であって、該MEMS部を積層して、MEMSシステムを形成する際にフラッシュ・マウント可能なキャビティーを前記MEMS部内に有している。 Micro electromechanical MEM components are created which include at least one integrated circuit die (110p). A cavity in the MEM component modules (300a 300e) further allows for the flush mounted attachment of component modules when the component modules are stacked to create MEM system structures. Commonly positioned via holes within the component modules provide for communication among the dies (110a 110b 110c) on the stacked modules. In one embodiment of the invention module layers are stacked in an alternating manner that further creates within in the structure horizontal interlocking slots and vertical chambers. The interlocking slots can be used to join a plurality of structures together and the vertical chambers can be used to draw heat from the structure (400).
73 US6396711 2002/05/28 Agere Systems Guardian Corporation Orlando FL [US] Lucent Technologies Inc. Murray Hill NJ [US] Interconnecting micromechanical devices A3 DA01 PB01 PH01 MA01 4 MEMSシステムの配線構造に関するもので、典型的なMEMSのアレイは、マルチチップモジュールで駆動される多数の個々の機械部で成り立っており、前記マルチチップモジュールを配線基板の両面にマウントすることで高密度の配線部を得る。 The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.
74 US6710311 2004/03/23 STMicroelectronics S.r.l. Agrate Brianza [IT] Process for manufacturing integrated chemical microreactors of semiconductor material A3 DC01 DEX PB02 FP 完全に集積化され、表面、および半導体基板中にふたつの溝で表面から裏面まで通じた、少なくともひとつの埋込みチャンネル集合体の収容(ハウジング)部位を有する前記半導体基板に形成されたマイクロリアクターである。 The microreactor is completely integrated and is formed by a semiconductor body having a surface and housing at least one buried channel accessible from the surface of the semiconductor body through two trenches. A heating element extends above the surface over the channel and a resist region extends above the heating element and defines an inlet reservoir and an outlet reservoir. The reservoirs are connected to the trenches and have in cross-section a larger area than the trenches. The outlet reservoir has a larger area than the inlet reservoir. A sensing electrode extends above the surface and inside the outlet reservoir.
75 US6713298 2004/03/30 Board of Regents The University of Texas System Austin TX [US] Method and apparatus for the delivery of samples to a chemical sensor array A3 DC01 DE01 FP 多数の分析用流体を高速で評価するシステムであって、光源、センサーアレイ、検出器を含み、前記センサーアレイはその中に複数のキャビティーが形成されている支持母体から成り、前記キャビティーには化学的に敏感な粒子が配列されている。 A system for the rapid characterization of multi-analyte fluids in one embodiment includes a light source a sensor array and a detector. The sensor array is formed from a supporting member into which a plurality of cavities may be formed. A series of chemically sensitive particles are in one embodiment positioned within the cavities. The particles may be configured to produce a signal when a receptor coupled to the particle interacts with the analyte. Using pattern recognition techniques the analytes within a multi-analyte fluid may be characterized.
76 US6728432 2004/04/27 Raytheon Company Waltham MA [US] Highly adaptable heterogeneous power amplifier IC micro-systems using flip chip and micromechanical technologies on low loss substrates A3 PH04 FP 第一のMEMSは第一のコンタクトを有する基板にマウントされ、第二のコンタクトが基板に形成される。第一の絶縁層は第二のMEMSを基板上で支持している前記基板にマウントされる。第二のMEMSは第一と第二の接続を、その基板底面に有している。 A first MEM is mounted on a substrate having a first contact and a second contact is mounted on a substrate. A PA power cell is thermally connected to the substrate using a thermal bump. The power cell is electrically insulated from the substrate. The power cell has a first power cell bump and a second power cell bump as pathways for I/O functions. A first insulator is mounted on the substrate supporting a second MEM above the substrate. The second MEM has a first connection and a second connection The first connection and the second connection are located on a bottom surface of the second MEM. A first conductive via vertically traverses the first insulator and is connected to the first connection from the second MEM. This first conductive via is further connected to a first conductor. The first conductor is insulated from substrate by a first insulating layer. The first conductor is further connected to the first power cell bump. A second conductor is insulated from the substrate by a second insulating layer. The second conductor is connected to a second conductive via. The second conductive via traverses vertically a second insulator. The second conductive via is connected to a first metal member. The first metal member is formed over the upper surface of the second insulator and connected to a first input to the first MEM switch. A second metal member is connected to the second contact of the first MEM switch. The second metal member is formed over the upper surface of a third insulator. The third insulator is positioned over the substrate.
77 US6756310 2004/06/29 Rockwell Automation Technologies Inc. Mayfield Heights OH [US] Method for constructing an isolate microelectromechanical system (MEMS) device using surface fabrication techniques A3 DDX PA02 1 電気的に分離されているMEMSの製造法に関するものであり、表面マイクロマシーニング技術を用いて、電導性の不可動な部位と可動部位とを空間的に分離して作製する方法を提供する。 A method for fabricating an electrically isolated MEMS device is provided that uses surface fabrication techniques to form a conductive stationary MEMS element and a movable MEMS element spaced apart from the conductive stationary MEMS element. The movable element includes a nonconductive base which provides for electrical isolation between a plurality of conductive members extending from the base. Modifications to the basic process permit the incorporation of a wafer-level cap which provides mechanical protection to the movable portions of the device.
78 US6759309 2004/07/06 Applied Materials Inc. Santa Clara CA [US] Micromachined structures including glass vias with internal conductive layers anodically bonded to silicon-containing substrates A3 PG01 MA01 2C 基板上の、一部はガラスや単結晶シリコンである多数の積層膜の垂直方向の配線の形成方法であり、積層したり、陽極ボンディングして、電気的に接続されたマルチ・ユニットを形成可能な基本ユニットを提供する。 Disclosed herein are methods of preparing vertical electrical interconnects within multiple layers of substrates where a portion of the substrate layers are glass and a portion of the substrate layers are single-crystal silicon. The methods taught herein can be used to prepare basic units which can be stacked and anodically bonded together to form electrically connected multi-unit structures. The methods of the invention are particularly advantageous in the fabrication of microcolumns and especially an array of microcolumns of the kind used in electron optics including electron microscopes and lithography apparatus.
79 US6773401 2004/08/10 Acuson Corporation Mountain View CA [US] Diagnostic medical ultrasound systems and transducers utilizing micro-mechanical components A3 DB01 DB06 DBX DDX 3 超音波システム中のMEMS部位の使用法に関するもので、トランデューサーヘッド/コネクターのマイクロリレー、マイクロスイッチ、インダクターとシステムのトランデューサーコネクターや他の部位とカップリングされている。 The use of any micro-mechanical component in an ultrasound system is disclosed. In particular the use of micro-relays micro-switches and inductors in the transducer probe head in the transducer connector coupled with the system transducer connector(s) or anywhere else in the system. In an ultrasound system micro-mechanical components such as micro-fabricated switches relays and inductors permit impressive size reduction cost reduction signal-integrity enhancement and improved operational flexibility.
80 US6784020 2004/08/31 Asia Pacific Microsystems Inc. Hsinchu [TW] Package structure and method for making the same A3 PH04 PHX 2u-2 パッケージ構造やシステム・イン・パッケージ(SiP)中のデバイスの製造方法に関するもので、集積化、集合化された素子が配列され、あらかじめボンディングされた基板と、流体が包含された材料であらかじめボンディングされた基板界面の残った開口部をシールする方法である。 A package structure and method for making devices of system-in-a-package (SiP). Substrates with integrated and assembled elements can be aligned and pre-bonded together and fluidic encapsulating materials is applied to seal the rest opening of pre-bonded interface of substrates. Three dimensional and protruding microstructures elements and MFMS devices can be accommodated and protected inside a spatial space formed by the bonded substrates. By applying the technologies of flip-chip chip-scale-packaging and wafer-level-packaging in conjunction with present invention then plural elements and devices can be packaged together and become a system device in wafer-level-system-in-a-package (WLSiP) format.
81 US6784771 2004/08/31 New Peregrine Inc. San Jose CA [US] MEMS optical mirror array A3 DA01 DA07 PA01 PB01 PIX MD02 MD03 MD04 MD06 1 コンパクトで高アスペクトレシオのMEMS光学スイッチとその製法であり、外部は第一軸に対して第一の回転自由度を有するようにマウントされ、内部は外部に比較して、第二軸の回転自由度を有するように機械的に外部とカップリングされている。 A compact high aspect ratio MEMS optical switch and a process for fabricating same are disclosed. An outer body portion is mounted so as to have a first rotational degree of freedom about a first axis. An inner body portion is coupled mechanically to the outer body portion so as to have a second rotational degree of freedom relative to the outer body portion about a second axis the second axis being substantially perpendicular to the first axis and in the plane of the outer body portion. The inner body portion is further coupled to the outer body portion in a manner such that the inner body portion rotates with the outer body portion about the first axis if the outer body is rotated about the first axis such that the second axis remains substantially in the plane of the outer body portion as the outer body portion rotates about the first axis. An outer electrostatic actuator is configured to rotate the outer body portion about the first axis when an electrostatic force is applied to the outer electrostatic actuator. An inner electrostatic actuator is configured to rotate the inner body portion relative to the outer portion about the second axis when an electrostatic force is applied to the inner electrostatic actuator. The outer body portion inner body portion outer electrostatic actuator and inner electrostatic actuator are formed in just two structural layers. In one embodiment the inner body portion comprises a metal substrate on which a metal payload such as an optical mirror is formed.
82 US6794793 2004/09/21 Memx Inc. Albuquerque NM [US] Microelectromechnical system for tilting a platform A3 DA01 PI02 PI03 MA01 MA02 MB01 FP MEMSであって、基板から両方に昇降可能なプラットフォームを有し、前記基板上にひとつかふたつ、またはそれ以上の自由度で基板に対して、傾斜可能に形成されて成るものである。 The present invention provides a MEM system (10) having a platform (14) that is both elevatable from the substrate (12) on which it is fabricated and tiltable with one two or more degrees of freedom with respect to the substrate (12). In one embodiment the MEM system (10) includes the platform (14) a pair of A-frame structures (40) and two pairs of actuators (30) formed on the substrate (12). Ends (46A) of rigid members (46) extending from apexes (40A) of the A-frame structures (40) are attached to the platform (14) by compliant members (48A 48B). The platform (14) is also attached to the substrate (12) by a compliant member (48C). The A-frame structures (40) are separately pivotable about bases (40B) thereof. Each pair of actuators (30) is coupled through a yoke (32) and displacement multiplier (34) to one of the A-frame structures (40) and is separately operable to effect pivoting of the A-frame structures (40) with respect to the substrate (12) by equal or unequal angular amounts. Upon pivoting the A-frame structures (40) act as lever arms to both lift the platform (14) and tilt the platform (14) with respect to the substrate (12) with at least one degree of freedom. Since the platform (14) lifts up from the surface of the substrate (12) it may be tilted at large angles with respect to the substrate (12).
83 US6796179 2004/09/28 California Institute of Technology Pasadena CA [US] Split-resonator integrated-post MEMS gyroscope A3 DD02 PA05 PB01 PC03 PH01 PI03 MA01 MB01 MD02 MD04 1 MEMS技術を使用して形成可能な分離型共鳴器を集積したポスト振動型マイクロジャイロスコープであり、前記ジャイロスコープは互いにボンディングされた二つのジャイロスコープ部位を含み、前記ジャイロスコープは共鳴ペタル、電極、集積された半分のポストを含む。 A split-resonator integrated-post vibratory microgyroscope may be fabricated using micro electrical mechanical systems (MEMS) fabrication techniques. The microgyroscope may include two gyroscope sections bonded together each gyroscope section including resonator petals electrodes and an integrated half post. The half posts are aligned and bonded to act as a single post.
84 US6797187 2004/09/28 Sandia Corporation Albuquerque NM [US] Surface-micromachined microfluidic devices A3 DC01 DC03 DCX DEX PA01 PA02 PB01 PB02 PC01 PC03 PE01 PGX PI02 PJ06 MA01 MA02MB01 MB03 MD04 MD07 MD10 ME03 MF01 MF02 MF05 MI02 5A 表面マイクロマシーニング技術を使用して製造可能なマイクロ流体デバイスであって、電気浸透力、または電磁場を利用して、マイクロチャンネルに流体を流すものであり、前記チャンネルは少なくとも部分的に窒化シリコンで裏打ちされている。 Microfluidic devices are disclosed which can be manufactured using surface-micromachining. These devices utilize an electroosmotic force or an electromagnetic field to generate a flow of a fluid in a microchannel that is lined at least in part with silicon nitride. Additional electrodes can be provided within or about the microchannel for separating particular constituents in the fluid during the flow based on charge state or magnetic moment. The fluid can also be pressurized in the channel. The present invention has many different applications including electrokinetic pumping chemical and biochemical analysis (e.g. based on electrophoresis or chromatography) conducting chemical reactions on a microscopic scale and forming hydraulic actuators.
85 US6798954 2004/09/28 3M Innovative Properties Company St. Paul MN [US] Packaged optical micro-mechanical device A3 DA01 DA02 PE01 PGX PH03 PH04 PI02 MA02 MB01 MDX MEX MF05 11 パッケージされた光学MEMSデバイスに関するもので、基板の第一の面に形成されたひとつ以上の光学MEMSを含むチップであり、前記第一の面はチップの参照面を含むものである。 A packaged optical micro-mechanical device. A die includes one or more optical micro-mechanical devices on a first surface of a substrate. The first surface includes a die reference surface. A package frame includes an aperture and a package frame reference surface proximate the aperture adapted to receive the die reference surface such that the optical micro-mechanical devices are located in the aperture. One or more V-grooves are positioned relative to an optical interface reference plane adjacent to the micro-mechanical devices and terminating adjacent to the aperture. One or more optical fibers are located in the V-grooves optically coupled with one or more of the optical micro-mechanical devices.
86 US6800849 2004/10/05
Microfluidic array devices and methods of manufacture and uses thereof A3 DC01 DEX PB01 PE01 PGX PJX MDX ME02 ME07 ME09 ME11 MEX MF01 MF02 MF03 6 マイクロ流体ノズルアレイデバイスであって、各デバイスはそのひとつの表面から外部に広がる少なくともノズルを有し、チップの開口部は100μmか、好ましくはそれ以下の直径を有する。 Microfluidic nozzle array devices are provided with the body of each device having at least one nozzle extending outwardly from one surface of the body. Each nozzle includes a tip opening having a diameter of equal to or less than about 100 mu m preferably 50 mu m and more preferably 20 mu m and an outer diameter of nozzle is equal to or less than about 150 mu m preferably 100 mu m and more preferably 50 mu m. The microfluidic nozzle array devices are fabricated using an injection molding process and find particular utility in a wide range of applications including but not limited to nanospray/electrospray applications mass spectrometer applications optical spectrometry applications spotting applications (i.e. DNA or protein array) etc.
87 US6812617 2004/11/02 Hewlett-Packard Development Company L.P. Houston TX [US] MEMS device having a flexure with integral electrostatic actuator A3 DA04 PI03 1 MEMSデバイスであって、可動な質量部を有し、前記可動部を支えるフレーム部、前記可動部と支持部位に渡たる湾曲部からなり、該湾曲部には前記質量部を可動にする集積されたアクチュエーターが具備される。 A micro-electro-mechanical device comprises a moveable mass a frame for supporting the mass and a flexure extending between the mass and the frame. The flexure includes an integral actuator for moving the mass member with respect to the frame.
88 US6818959 2004/11/16 BTG International Limited London [GB] MEMS devices with voltage driven flexible elements A3 DAX DB01 DDX PA01 PB01 PE01 PE04 MA01 MD01 ME02 ME03 6b ナノメータスケールのアレイであって、ふたつかまたはそれ以上のアームを有し、並んで配列され、前記アーム内では、ナノサイズの梁がお互いに近づくか、離れるかの動作または変形するかして、望ましい光学的、電気的、機械的動作を行う。 An array of nanometric dimensions consisting of two or more arms positioned side by side wherein the arms are of such nanometric dimensions that the beams can be moved or deformed towards or away from one another by means of a low voltage applied between the beams whereby to produce a desired optical electronic or mechanical effect. At nanometer scale dimensions structures previously treated as rigid become flexible and this flexibility can be engineered since it is a direct consequence of material and dimensions. Since the electrostatic force between the two arms is inversely proportional to the square of the distance a very considerable force will be developed with a low voltage of the order of 1-5 volts which is sufficient to deflect the elements towards or away from one another. As preferred the bulk of the element may comprise an insulating material and an upper conductive layer is applied on the upper surface where the element is formed by a nanolithography method such as nanoimprint lithography (NIL). Alternatively the elements may be formed completely of conductive material where the elements are formed by a CMOS metalization process.
89 US6825491 2004/11/30 Commissariat a l'Energie Atomique Paris [FR] Integrated variable electrical capacitance device and method for producing said device A3 DB05 PB01 PC01 PC03 PI03 MA01 MA02 MB01 MD01 MF02 MGX 9 集積化された可変容量デバイスであり、少なくともひとつの可動な電機子を形成し、少なくともひとつの固定された電機子と対面する主要面を有する少なくともひとつのメンブレン膜からなることを特徴とする。 The present invention concerns an integrated variable capacitance device comprising at least one membrane (12) forming at least one mobile armature and having at least one principal face facing at least one fixed armature. In accordance with the invention the membrane has at least one rigidity rib (32) lying in a perpendicular direction to said principal face. Application in the production of resonant filters.
90 US6864480 2005/03/08
Interface members and holders for microfluidic array devices A3 DEX 5 マイクロ流体デバイス、および、少なくともひとつのマイクロ流体デバイスと第二のマイクロ流体デバイスの界面に関するもので、前記少なくともひとつのマイクロ流体デバイスはその内部に複数のリザーバーと上下の面、および複数の開口部を有する。 A member for holding at least one microfluidic device and providing an interface between the at least one microfluidic device and a second device is provided. The at least one microfluidic device has a plurality of reservoirs formed therein and the member includes a body having an upper face and a lower face and a plurality of open well members formed therein. Each well member is defined by a well wall and includes a first end and an opposing second end wherein the second end is configured and dimensioned for frictionally engaging the at least one microfluidic device such that at least some of the open well members and the reservoirs of the microfluidic device align with one another. An apparatus for interfacing with a mass spectrometer to perform a nanospray application is also provided.
91 US6890093 2005/05/10 Nanostream Inc. Pasadena CA [US] Multi-stream microfludic mixers A3 DFX FP 可動部なしで複数の流体を混合可能な堅固な構造のマイクロ流体デバイスであり、前記デバイスは3次元構造の種々の層に設けられたマイクロ流体チャンネルを有し、混合は流路の操作および、または流体どおしの接触で実行される。 Robust microfluidic mixing devices mix multiple fluid streams passively without the use of moving parts. In one embodiment these devices contain microfluidic channels that are formed in various layers of a three-dimensional structure. Mixing may be accomplished with various manipulations of fluid flow paths and/or contacts between fluid streams. In various embodiments structures such as channel overlaps slits converging/diverging regions turns and/or apertures may be designed into a mixing device. Mixing devices may be rapidly constructed and prototyped using a stencil construction method in which channels are cut through the entire thickness of a material layer although other construction methods including surface micromachining techniques may be used.
92 US6893877 2005/05/17 Massachusetts Institute of Technology Cambridge MA [US] Methods for screening substances in a microwell array A3 DEX FP 細胞や液体中の浮遊物などを含む液体または材料中の多くの顕微鏡試料の操作、分析を行う機器の製造法や使用法に関するものであって、平行な貫通孔がプラテン中に穿たれ、試料の供給は該貫通孔に対し、勾配をつけて行われる。 Methods for manufacturing and using an apparatus for manipulating and analyzing a large number of microscopic samples of a liquid or materials including cells in liquid suspension. Parallel through-holes are formed in a platen and loaded with a liquid. Loading may be performed in such a way as to create a gradient with respect to the position of the through-holes of the concentration of a particular substance or of another quantity. Mixing of the contents of through-holes may be obtained by bringing filled microwell arrays into contact with each other with registration of individual through-holes.
93 US6900021 2005/05/31 The University of Alberta Alberta [CA] Microfluidic system and methods of use A3 DEX FP 新規マイクロ流体デバイスとその使用法に関するもので、細胞の色々な化合物の反応や効果の生体外の研究に用いられる。とりわけ、個々の細胞の化合物の影響を研究するためにマイクロ流路系のフローを止めるための方法に関するものである。 This invention relates to a novel microfluidic device and methods of using this device to conduct in vitro studies on the reaction and effects of various compounds on cells. More particularly it relates to a method for using stop flow in a microfluidic system to study the effect of compounds on individual cells. It also provides a method for observing the effects of candidate compounds on leukocyte rolling.
94 US6911345 2005/06/28 California Institute of Technology Pasadena CA [US] Methods and apparatus for analyzing polynucleotide sequences A3 DEX FP ポリヌクレオチド配列の分析に使用される機器に関するもので、少なくともひとつの微小で、かつ多層で弾性的に合成された多層のチャンネルとを持つフローセルと、流入口および排出口を有する。 The present invention provides an apparatus for analyzing the sequences of polynucleotides. The apparatus comprises (a) flow cell which has at least one microfabricated multilayer elastomeric synthesis channel; and (b) an inlet port and an outlet port. The inlet port and outlet ports are in fluid communication with the flow cell for flowing fluids into and through the flow cell.
95 US6925390 2005/08/02
Customized microfluidic device design ordering and manufacturing A3 DEX FP マイクロ流路デバイスを設計するためのプロセスやシステムに関するもので、電子回路ネットワーク全体の要求側と供給側のコミニュケーションを含む相互プロセスを提供する。 Processes and systems are described for designing microfluidic devices via an interactive process involving communication between a requestor and a provider over an electronic network.
96 US6929730 2005/08/16
Two dimensional microfluidic gene scanner A3 DE01 FP 二次元生体分子の分離を行うためのマイクロ流路デバイスに関するもので、第一のマイクロチャンネルで一次元の分離を行った後、電子力学的かつ同時に二次元のマイクロチャンネルアレイに移送する。 One embodiment of the invention relates to a microfluidic apparatus for performing two dimensional biomolecular separations. According to one aspect of the invention after a first dimension separation in a first microchannel the sample material is electrokinetically and simultaneously transferred to an array of microchannels in the second dimension (e.g. by changing the electric potentials at the reservoirs connected to the microchannels). Preferably any separation accomplished in the first dimension is completely retained upon transfer to the second dimension. According to another aspect of the invention the separation in the second dimension is performed using a temperature gradient (e.g. a spatial or temporal temperature gradient). According to one embodiment of the invention the biomolecular material comprises DNA and the first dimension separation is a sized-based separation and the second dimension separation is a sequence-based separation.
97 US6948843 2005/09/27 Covaris Inc. Woburn MA [US] Method and apparatus for acoustically controlling liquid solutions in microfluidic devices A3 DFX FP 音響エネルギーを流体中の動作のコントロールに用いるもので、音響エネルギーを自然に発生した核形成位置に指向させ、流体中の挙動をコントロールするものである。 Acoustic energy is used to control motion in a fluid. According to one embodiment the invention directs acoustic energy at selected naturally occurring nucleation features to control motion in the fluid. In another embodiment the invention provides focussed or unfocussed acoustic energy to selectively placed nucleation features to control fluid motion. According to one embodiment the invention includes an acoustic source a controller for controlling operation of the acoustic source and one or more nucleation features located proximate to or in the fluid to be controlled.
98 US6951632 2005/10/04 Fluidigm Corporation South San Francisco CA [US] Microfluidic devices for introducing and dispensing fluids from microfluidic systems A3 DFX FP マイクロ流路デバイス、およびそのシステムや使用法に関するもので、前記マイクロ流体デバイス中のマイクロ流体チャンネルへの流体の導入や排出を助長するものである。 The present invention provides microfluidic devices systems and methods for using the same which facilitate the introduction of fluid to and from a microfluidic channel located within the microfluidic devices.
99 US7046539 2006/05/16 Sandia Corporation Albuquerque NM [US] Mechanical memory A3 DFX FP ファーストイン・ファーストアウト( FIFO )型MEMSメモリーであって、該MEMSメモリーは複数のメモリーセルを有し、前記各メモリーセルはふたつの異なる論理状態をそれぞれ示す梁を有している。 A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining and can be formed as either a nonvolatile memory or as a volatile memory.
100 US7060227 2006/06/13
Microfluidic devices with raised walls A3 DEX 9 マイクロ流体デバイスであって、例えば、高くした壁を持つチャンネルやチャンネルを形成するための突起やくぼみといったビルトインアライメント法を用いて、マイクロ流体部品から組み立てられたものである。 A microfluidic device is provided and comprises a device that is assembled from segments of microfluidic features using built-in alignment features such as the raised walls of the channels or protrusion/recess pairs to comprise channels nozzles optical detectors distillation columns etc. to form a device for a specific application such as an electrospray-mass spectrometer interface. Some of the segments can be of standard dimensions with standard alignment features so that the user may assemble microfluidic devices for specific applications using standard prefabricated segments as part thereof.
101 US7097347 2006/08/29 UOP LLC Des Plaines IL [US] Static mixer and process for mixing at least two fluids A3 DFX FP 少なくともふたつの流体を混合する新規な機器およびその混合法に関するもので、少なくともふたつの供給チャンネルを有し、混合チャンバーへ液を供給し、渦を形成し、高性能の混合能力と圧力降下特性を有する。 A novel mixing apparatus and process for mixing at least two fluids are disclosed. Excellent mixing and superior pressure drop characteristics are achieved in a device comprising at least two supply channels to feed a mixing chamber and create a vortex. The alignment of the supply channels is such that fluids are introduced into the chamber at both tangential and radial directions. In the case of gas/liquid mixing particularly advantageous is the injection of the liquid stream tangentially and the gas stream radially. When two liquid streams are mixed it is desirable to distribute them into fine interdigitated channels prior to introduction into a supply channel and finally into the chamber. The mixed stream is generally withdrawn from the center of the swirling vortex and in a direction perpendicular to the plane of the vortex.
102 US7101514 2006/09/05
Control devices for evaporative chemical mixing/reaction A3 DEX FP マイクロまたはナノスケールの薬品混合用のマイクロ化学チップであって、少なくともひとつの導入口と排出口を持ち、マイクロ蒸発器、マイクロチャンバー、マイクロイニシエーターを有することを特徴とする。 An improved chemical mixing micro-device with features on the micro- and nano-scale. The micro-device is comprised of at least one chemical inlet port and one chemical outlet port a micro-evaporator a micro-chamber and a micro-initiator. Also a method of mixing at least one chemical in an evaporative mixing and/or reacting chamber is disclosed.
103 US6696645 2004/02/24 The Regents of the University of Michigan (Ann Arbor MI) On-wafer packaging for RF-MEMS A4

A4のため不要 An RF micro-electro-mechanical system including a first silicon wafer having a top surface and a bottom surface. The top surface being opposite the bottom surface. A bore extends through the first silicon wafer. A micro-electro-mechanical device is provided and coupled to the top surface of the first silicon wafer. An electrical feed line then extends along the bottom surface of the first silicon wafer and an electrical interconnect electrically couples the micro-electro-mechanical device and the electrical feed line through the bore.
104 US7160025 2003/06/11 Agency for Science Technology and Research Singapore [SG] National University of Singapore Singapore [SG] Micromixer apparatus and methods of using same A4 DC01 DCX マイクロ流路中の液体の混合を遠心力を利用して行うために流路を渦巻状に形成した装置。 Microfluidics mixing apparatus and methods of using same are disclosed for mixing fluids using increasing centrifugal force as the fluids being mixed traverse a mixing channel. One inventive apparatus comprises a generally planar substrate having a top major surface and a bottom major surface generally parallel to the top major surface and a cover plate over the top major surface. The substrate has at least one inlet port that routes fluid to the top major surface and at least one outlet port for mixed fluid. The substrate comprises a mixing channel having a depth measured from the top surface and a width the mixing channel adapted to route fluids to be mixed therein in laminar flow and in a substantially spiral flow pattern that is parallel to the top surface. Apparatus of the invention can mix fluids flowing serially or two or more fluids entering the device from different feed channels.
105 US7169314 2002/05/15 California Institute of Technology Pasadena CA [US] Microfabricated elastomeric valve and pump systems A3 DC02 DC03 MEX エラストマー構造のマイクロバルブやポンプシステムを作製する方法。 A method of fabricating an elastomeric structure comprising: forming a first elastomeric layer on top of a first micromachined mold the first micromachined mold having a first raised protrusion which forms a first recess extending along a bottom surface of the first elastomeric layer; forming a second elastomeric layer on top of a second micromachined mold the second micromachined mold having a second raised protrusion which forms a second recess extending along a bottom surface of the second elastomeric layer; bonding the bottom surface of the second elastomeric layer onto a top surface of the first elastomeric layer such that a control channel forms in the second recess between the first and second elastomeric layers; and positioning the first elastomeric layer on top of a planar substrate such that a flow channel forms in the first recess between the first elastomeric layer and the planar substrate.
106 US7169989 2004/11/01 Ben Gurion University of the Negev Research and Development Authority [IL] Process for creating a 3-dimensional configuration on a substrate A4 PJX MEX ポリマー基板に三次元微細構造を触媒を用いて、前記ポリマーの一部を選択的に除去して形成する。 The invention provides a process for introducing a three-dimensional configuration of micron to sub-micron size in a polymeric substrate comprising applying a catalyst for the selective removal of sub-unit parts of the polymer to at least one predetermined area of the polymer substrate via a pipette with a nano-sized orifice.
107 US7172735 2002/09/23 Institut fur Mikrotechnik Mainz GmbH Mainz [DE] Modular microreaction system A4 DC01 DCX 一単元の微細マイクロ反応システムでハウジングと各機能部から構成される。 A modular microreaction system comprising a housing and functional base modules accommodated therein. The housing has at least one fluid inlet and at least one fluid outlet. The base modules are arranged one behind another in a row in the housing and being designed such that fluid can flow successively through them in series. At least some of the base modules are constructed from a plurality of substantially rectangular foils having plate-like surfaces in essentially parallel planes which foils are connected to one another and are arranged in layers one above another forming a foil stack. At least a first of the foils having at least one of microstructured channels sensor elements heating elements and combinations thereof on a plate-like surface of the at least a first of the foils. Each foil stack also has at least one foil which is provided on a plate-like surface of the at least one foil with channels which are constructed such that for one fluid line they lead from one side of the foil stack to another side of the foil stack. The base modules (2 2' 2'') each have at least one frame element (10) which is arranged essentially perpendicular to planes of the foils and is connected to the foil stack in a fluid-tight manner and the foil stacks together with the frame elements form base elements that can be inserted into and removed from the housing (1) as a unit.
108 US7175772 2003/12/16 Micron Technology Inc. Boise ID [US] Small scale actuators and methods for their formation and use A4 DC02 基板内にチャンネルを形成し、その中に微細アクチュエーターを形成し、稼動領域とする。 An actuator assembly and method for making and using an actuator assembly. In one embodiment the assembly includes an actuator body having an actuator channel with a first region and a second region. An actuator is disposed in the actuator channel and is movable when in a flowable state between a first position and a second position. A heater is positioned proximate to the actuator channel to heat the actuator from a solid state to a flowable state. A source of gas or other propellant is positioned proximate to the actuator channel to drive the actuator from the first position to the second position. The actuator has a higher surface tension when engaged with the second region of the channel than when engaged with the first region. Accordingly the actuator can halt upon reaching the second region of the channel due to the increased surface tension between the actuator and the second region of the channel.
109 US7180144 2005/05/13 Walsin Lihwa Corporation Taipei [TW] Corner compensation method for fabricating MEMS and structure thereof A4 PB02 PI02 MEMS作製の際にDRIE後のリリースエッチングの際に保護層を形成しておき、余分なアンダーカットを防止する。 A corner-compensation method for fabricating MEMS (Micro-Electro-Mechanical System) is provided. The method includes steps of: (a) providing a substrate; (b) forming a conductive layer on the substrate; (c) sequentially forming a masking layer having structural openings and a photoresist layer on the conductive layer; (d) executing a photolithography for etching the photoresist layer and the masking layer to form at least one hole penetrating the photoresist layer and the masking layer; (e) etching the conductive layer and the substrate to extend the at least one hole to upper portions of the substrate; (f) removing the photoresist layer and etching the conductive layer and the substrate via the structural openings and the at least one hole respectively to form deep trench structures having different depths; (g) forming a peripheral compensation structure on a side-wall portion of the deep trench structure having the different depths; (h) removing portions of the peripheral compensation structure laterally and the substrate for exposing an uncompensated silicon structure; and (i) side etching the uncompensated silicon structure to be terminated by the peripheral compensation structure around the at least one hole.
110 US7189378 2002/02/04 Kulite Semiconductor Products Inc. Leonia NJ [US] Miniature reaction chamber template structure for fabrication of nanoscale molecular systems and devices A4 DCX マイクロ反応装置用のテンプレート構造であり、シリコン、パイレックス、金属などから形成される。 A unique micro-miniature reaction chamber template structure is disclosed for the fabrication of nanoscale molecular systems and devices. The structure is composed of multiple layers of silicon (either doped or intrinsic) Pyrex and various metals. The silicon may or may not be totally or partially covered with silicon dioxide. The Pyrex is chosen to be suitable for field-assisted bonding to silicon and the various metal layers are selected for their adherence to silicon or Pyrex as well as their conductivity and their chemical reactivity. The basis structure may contain a number of tubes or fluidic pipes of varying cross sections. The structure consists of a layer of silicon bonded to a layer of Pyrex which is in turn bonded to another layer of silicon and therefore there is a composite structure which consists of a laminate of silicon glass and silicon. The glass is extremely thin and is Pyrex having sodium ions which will be transported upon the application of a voltage to the structure to cause the sodium ions to be transported leaving the dangling oxygen bonds in the glass or the silicon layers.
111 US7212081 2005/06/02 Sony Corporation Tokyo [JP] Micromachine and method of producing the same A4 DB04 高周波用のマイクロマシンフィルターでベルト状の共振電極が空洞上に形成されている。 Disclosed is a micromachine as a high-frequency filter which includes a high Q value and is suitable for higher frequency bands. The micromachine (1) includes an output electrode (7) formed on a substrate (5) an interlayer insulating film (9) which covers the substrate (5) and includes an opening (9a) whose bottom is the output electrode (7) and a beltlike resonator electrode (11) so formed on the interlayer insulating film (9) as to traverse above the space (A) in the opening (9a) with the resonator electrode (11) being concave toward the opening (9a) along the side wall of the opening (9a).
112 US7235184 2003/06/13 Advanced Research Corporation Minneapolis MN [US] Solid state membrane channel device for the measurement and characterization of atomic and molecular sized samples A4 DC01 PEX PI03 ポリマー分子の特性評価のためのマイクロメンブレン構造を薄膜形成技術を用いて作製する。 A solid state device is formed through thin film deposition techniques which results in a self-supporting thin film layer that can have a precisely defined channel bored therethrough. The device is useful in the chacterization of polymer molecules by measuring changes in various electrical characteristics as molecules pass through the channel. To form the device a thin film layer having various patterns of electrically conductive leads are formed on a silicon substrate. Using standard lithography techniques a relatively large or micro-scale aperture is bored through the silicon substrate which in turn exposes a portion of the thin film layer. This process does not affect the thin film. Subsequently a high precision material removal process is used (such as a focused ion beam) to bore a precise nano-scale aperture through the thin film layer that coincides with the removed section of the silicon substrate.
113 US7240420 2001/06/19 Zyvex Labs LLC Richardson TX [US] System and method for post-fabrication reduction of minimum feature size spacing of microcomponents A3 PI01 マイクロ部品間の隙間を低減する方法で、少なくともひとつのマイクロ部品は分離領域を減少させる機能を有する。 A system and method are disclosed which enable post-fabrication reduction of minimum feature size spacing of microcomponents. A method for producing an assembly of microcomponents is provided in which at least two microcomponents are fabricated having a separation space therebetween. At least one of the microcomponents includes an extension part that is operable to reduce the separation space. Such an extension part may include an extension member that is movably extendable away from its associated microcomponent to reduce the separation space between its associated microcomponent and another microcomponent. The extension part may be latched at a desired position by a latching mechanism. The extension part may be implemented such that the extension member eliminates the separation space thereby resulting in such extension member engaging another microcomponent. Such engagement may be achieved without requiring power to be applied to the microcomponents. Certain embodiments are insensitive to etching inaccuracy encountered during fabrication.
114 US7247247 2004/05/06 Walsin Lihwa Corporation Taipei [TW] Selective etching method A4 PB02 PI02 トンネル部の周囲に横方向に強度を持つ側壁を設けて、可動部を形成する方法。 A selective etching method with lateral protection function is provided. The steps includes: (a) providing a substrate; (b) forming a plurality of tunnels; (c) forming a lateral strengthening structure at a peripheral wall of the tunnels; (d) removing a bottom portion of the lateral strengthening structure and a part of the substrate by an etching process so as to form a lower structure and expose an unstrengthened structure; and (f) etching the unstrengthened structure laterally so as to form an upper structure.
115 US7259903 2006/08/24 AMBIT Corporation Manchester MA [US] Optical switching arrangement using carbon nanotubes A1 DA01 MI04 使用光の波長サイズのカーボンナノチューブを用いて、光スイッチを形成する。 An optical antenna collects modifies and emits energy at light wavelengths. Linear conductors sized to correspond to the light wavelengths are used. Nonlinear junctions of small dimension are used to rectify an alternating waveform induced upon the conductors by the lightwave electromagnetic energy. The optical antenna and junctions are effective to produce harmonic energy at light wavelengths. The linear conductors may be comprised of carbon nanotubes that are attached to a substrate material which may then be connected to an electrical port.
116 US7262522 2003/09/30 Rockwell Automation Technologies Inc. Mayfield Heights OH [US] Microelectromechanical isolating power converter A4 DBX MGX 静電的に駆動するMEMSを用いて、ジェネレーターへの電力伝達機構を形成する。 A microelectromechanical system (MEMS) device is used to transfer power from a source generator to a power generator that delivers electrical power to a load while maintaining electrical isolation between the source generator and power generator for size critical applications where transformers or coupling capacitors would not be practical but where electrical isolation is desired.
117 US7265647 2005/03/14 The Regents of the University of California Oakland CA [US] High isolation tunable MEMS capacitive switch A4 DB01 DB05 ふたつ以上の共振周波数を有するRF- MEMSスイッチを電極間に伝達線をまたぐ形状で形成する。 The systems and methods described herein provide for a radio frequency micro-electromechanical systems switch having two or more resonant frequencies. The switch can be configured as a capacitive shunt switch having a deflectable member coupled between two electrodes over a transmission line. A first insulator can be located between one of the electrodes and the deflectable member to form a capacitive element. The deflectable member can be deflectable between an up-state and a down-state the down-state capacitively coupling the deflectable member with the transmission line. The degree by which the deflectable member overlaps the first insulator can be adjusted to adjust the capacitance of the capacitive element and the resulting resonant frequency.
118 US7288940 2004/12/06 Analog Devices Inc. Norwood MA [US] Galvanically isolated signal conditioning system A4 DB01 SOIウエハ上に形成したカンチレバー形状のMEMSスイッチで信号のオン・オフを行う。 A galvanically isolated signal conditioning system includes a signal conditioning circuit on an integrated circuit chip; a flying capacitor; and a galvanically isolating MEMS switching device on an integrated circuit chip for selectively switching the flying capacitor from across a pair of input terminals in one state to across the input terminals of the signal conditioning circuit in another state.
119 US7298016 2004/05/25 Nantero Inc. Woburn MA [US] Electromechanical memory array using nanotube ribbons and method for making same A1 DBX MI05 電気配線上に懸架されたナノチューブリボンを用いたMEMSメモリセルアレイである。 Electromechanical circuits such as memory cells and methods for making same are disclosed. The circuits include a structure having electrically conductive traces and supports extending from a surface of the substrate and nanotube ribbons suspended by the supports that cross the electrically conductive traces wherein each ribbon comprises one or more nanotubes. The electro-mechanical circuit elements are made by providing a structure having electrically conductive traces and supports in which the supports extend from a surface of the substrate. A layer of nanotubes is provided over the supports and portions of the layer of nanotubes are selectively removed to form ribbons of nanotubes that cross the electrically conductive traces. Each ribbon includes one or more nanotubes.
120 US7299818 2004/12/23 Robert Bosch GmbH Stuttgart [DE] Integrated microvalve and method for manufacturing a microvalve A4 DC02 流体制御のマイクロバルブであって、積層基板内にダイヤフラム状に形成される。 An integrated microvalve has a substrate a first function layer applied to the substrate and a second function layer applied to the first function layer the first function layer being designed as a diaphragm in at least one valve area the second function layer being removed in the valve area and in a fluid discharge area and an anvil connected essentially only to the diaphragm being exposed from the substrate in the valve area a plate being applied to the second function area to form a valve space.
121 US7335527 2005/09/20
Method for microfabricating structures using silicon-on-insulator material A4 PB04 PC01 PCX PI02 SOIウエハを用いて、デバイス層をメサエッチすることを含む工程で構造部を形成し、MEMSを作製する方法。 The invention provides a general fabrication method for producing MicroElectroMechanical Systems (MEMS) and related devices using Silicon-On-Insulator (SOI) wafer. The method includes providing an SOI wafer that has (i) a handle layer (ii) a dielectric layer and (iii) a device layer wherein a mesa etch has been made on the device layer of the SOI wafer providing a substrate wherein a pattern has been etched onto the substrate bonding the SOI wafer and the substrate together removing the handle layer of the SOI wafer removing the dielectric layer of the SOI wafer then performing a structural etch on the device layer of the SOI wafer to define the device.
122 US7358580 2005/09/30 Intel Corporation Sacrificial layer technique to make gaps in MEMS applications A4 PI02 -
基板(110)上に三次元構造体(100)を形成する方法に関するものであり、第一の構造体(140 150)と第二の構造体(125)を犠牲層プロセスを用いて分離し、作製する。 A method comprising over an area of a substrate forming a plurality of three dimensional first structures; following forming the first structures conformally introducing a sacrificial material over the area of the substrate; introducing a second structural material over the sacrificial material; and removing the sacrificial material. An apparatus comprising a first structure on a substrate; and a second structure on the substrate and separated from the first structure by an unfilled gap defined by the thickness of a removed film.
123 US7362605 2006/05/22 Ambient Systems Inc. Nanoelectromechanical memory cells and data storage devices A1 DFX MI04 MI05 -
導電性のナノスケールサイズ、例えば、ナノチューブ、のビーム((110)を用いて、二値メモリーを形成する。電荷のやり取りで記憶を書き込み、消去を行う。 Nanoelectromechanical (NEM) memory cells are provided by anchoring a conductive nanometer-scale beam (e.g. a nanotube) to a base and allowing a portion of the beam to move. A charge containment layer is provided in the vicinity of this free-moving portion. To read if a charge is stored in the charge containment layer a charge is formed on the beam. If a charge is stored then forces between the charged beam and the charge containment layer will displace the free-moving portion of the beam. This movement may be sensed by a sense contact. Alternatively the beam may contact a sense contact at an ambient frequency when no charge is stored. Changing the amount of charge stored may change this contact rate. The contract rate may be sensed to determine the amount of stored charge.
124 US7374962 2005/09/29 Miradia Inc. Method of fabricating reflective spatial light modulator having high contrast ratio A4 DAX -
高コントラストの反射型の空間光変調器(1500)の作製法であり、ピクセルの反射面(1502)の背後に非反射物質を支持ポスト(1506)やヒンジ(1508)として配置する。 The contrast offered by a spatial light modulator device may be enhanced by positioning nonreflective elements such as supporting posts and moveable hinges behind the reflecting surface of the pixel. In accordance with one embodiment the reflecting surface is suspended over and underlying hinge-containing layer by integral ribs of the reflecting material defined by gaps in a sacrificial layer. In accordance with an alternative embodiment the reflecting surface is separated from the underlying hinge by a gap formed in an intervening layer such as oxide. In either embodiment walls separating adjacent pixel regions may be recessed beneath the reflecting surface to further reduce unwanted scattering of incident light and thereby enhance contrast.
125 US7410901 2006/04/27 Honeywell International Inc. Submicron device fabrication A4 PI02 -
トレンチ及びリリースされていないビームを含む基板材料をサブミクロンレベルで作製する方法であり、基板(20)上形成した第一の酸化膜(24)を初めにエッチングして形成する。 A method for fabricating substrate material to include trenches and unreleased beams with submicron dimensions includes etching a first oxide layer on the substrate to define a first set of voids in the first oxide layer to expose the substrate. A second oxide layer is accreted to the first oxide layer to narrow the first set of voids to become a second set of voids on the substrate. A polysilicon layer is deposited over the second oxide layer the first oxide layer and the substrate. A third set of voids is etched into the polysilicon layer. Further etching widens the third set of voids to define a fourth set of voids to expose the first oxide layer and the substrate. The first oxide layer and the substrate is deeply etched to define beams and trenches in the substrate.
126 US7419581 2002/03/05 Robert Bosch GmbH Method for producing optically transparent regions in a silicon substrate A4 DC01 PCX MA01 MB01 -
シリコン基板(11)に光学的に透明な部分(15 16)を簡単にコスト低減にも有効な方法で形成する方法であり、まず、透明になる部分をポーラス状にエッチングし、その後その部分を酸化する。 A simple and cost-effective possibility is proposed for producing optically transparent regions (5 6) in a silicon substrate (1) by the use of which both optically transparent regions of any thickness and optically transparent regions over a cavity in a silicon substrate are able to be implemented. For this purpose first at least a specified region (5 6) of the silicon substrate (1) is etched porous. Thereafter the specified porous region (5 6) of the silicon substrate (1) is oxidized.
127 US7439823 2005/06/02 Matsushita Electric Industrial Co. Ltd. Electromechanical filter A4 DB04 -
電子機械式のフィルターで信号をインプットする第一の部位(1)とそれと予め決められた距離に第一の部位を囲むように形成された第二の部位(2)と更に同様に第二の部位を囲むように形成された第三の部位(3)からなる。 An object is to provide an electromechanical filter which can define a vibration mode so that a vibrator can be excited only in a desired vibration mode that is a filter which can suppress any vibration mode other than a desired vibration mode. The electromechanical filter includes a first member for inputting a signal a second member disposed at a predetermined distance from the first member so as to surround the first member and to be excited due to an electrostatic force caused by the signal input from the first member and a third member disposed at a predetermined distance from the second member so as to surround the second member and to detect vibration of the second member. The second member is designed to receive an attractive force from the first member and the third member so as to be bound and regulated as to a vibration direction.
128 US7446044 2006/09/19 California Institute of Technology Carbon nanotube switches for memory RF communications and sensing applications and methods of making the same A1 DB01 MI04 -
カーボンナノチューブ(1350)のスイッチであり、高濃度にドープされたシリコン基板(1310)にin situに形成され、プル電極(1330)により、電気的なスイッチとして働く。 Switches having an in situ grown carbon nanotube as an element thereof and methods of fabricating such switches. A carbon nanotube is grown in situ in mechanical connection with a conductive substrate such as a heavily doped silicon wafer or an SOI wafer. The carbon nanotube is electrically connected at one location to a terminal. At another location of the carbon nanotube there is situated a pull electrode that can be used to elecrostatically displace the carbon nanotube so that it selectively makes contact with either the pull electrode or with a contact electrode. Connection to the pull electrode is sufficient to operate the device as a simple switch while connection to a contact electrode is useful to operate the device in a manner analogous to a relay. In various embodiments the devices disclosed are useful as at least switches for various signals multi-state memory computational devices and multiplexers.
129 US7479232 2005/09/06 Robert Bosch GmbH Method for producing a semiconductor component and a semiconductor component produced according to the method A4 DD03 -
圧力センサー(100a)の低コスト化を図るために半導体基板(101)の中に予め、マスク(102)を用いて、ポーラス層領域(105)を形成しておく。 A method is for producing a semiconductor component e.g. a multilayer semiconductor element e.g. a micromechanical component e.g. a pressure sensor having a semiconductor substrate e.g. made of silicon and a semiconductor component produced according to the method. To reduce the production cost of such a semiconductor component in a first step a first porous layer is produced in the semiconductor component and in a second step a hollow or cavity is produced under or from the first porous layer in the semiconductor component with the hollow or cavity capable of being provided with an external access opening.